drm/i915: Make define for lrc state offset

More often than not, we need a byte offset into lrc
register state from the start of the hw state. Make it so.

Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20200423182355.21837-3-mika.kuoppala@linux.intel.com

diff --git a/drivers/gpu/drm/i915/gt/intel_context_sseu.c b/drivers/gpu/drm/i915/gt/intel_context_sseu.c
index 57a30956c922b5fd17a46e9d0d4f81713cd6070a..487299cb91f2e4a41e39a388726a39d875976ce7 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_context_sseu.c
+++ b/drivers/gpu/drm/i915/gt/intel_context_sseu.c
@@ -25,8 +25,7 @@ static int gen8_emit_rpcs_config(struct i915_request *rq,
                return PTR_ERR(cs);
 
        offset = i915_ggtt_offset(ce->state) +
-                LRC_STATE_PN * PAGE_SIZE +
-                CTX_R_PWR_CLK_STATE * 4;
+                LRC_STATE_OFFSET + CTX_R_PWR_CLK_STATE * 4;
 
        *cs++ = MI_STORE_DWORD_IMM_GEN4 | MI_USE_GGTT;
        *cs++ = lower_32_bits(offset);

diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 090be5981b55ff1976bd11d2266228e0ea9be1f1..214ea2a346932365d1cc6a847e3beb09d803b029 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -1213,7 +1213,7 @@ static void restore_default_state(struct intel_context *ce,
 
        if (engine->pinned_default_state)
                memcpy(regs, /* skip restoring the vanilla PPHWSP */
-                      engine->pinned_default_state + LRC_STATE_PN * PAGE_SIZE,
+                      engine->pinned_default_state + LRC_STATE_OFFSET,
                       engine->context_size - PAGE_SIZE);
 
        execlists_init_reg_state(regs, ce, engine, ce->ring, false);
@@ -3169,7 +3169,7 @@ check_redzone(const void *vaddr, const struct intel_engine_cs *engine)
 
 static void execlists_context_unpin(struct intel_context *ce)
 {
-       check_redzone((void *)ce->lrc_reg_state - LRC_STATE_PN * PAGE_SIZE,
+       check_redzone((void *)ce->lrc_reg_state - LRC_STATE_OFFSET,
                      ce->engine);
 
        i915_gem_object_unpin_map(ce->state->obj);
@@ -3216,7 +3216,7 @@ __execlists_context_pin(struct intel_context *ce,
                return PTR_ERR(vaddr);
 
        ce->lrc_desc = lrc_descriptor(ce, engine) | CTX_DESC_FORCE_RESTORE;
-       ce->lrc_reg_state = vaddr + LRC_STATE_PN * PAGE_SIZE;
+       ce->lrc_reg_state = vaddr + LRC_STATE_OFFSET;
        __execlists_update_reg_state(ce, engine, ce->ring->tail);
 
        return 0;
@@ -4866,7 +4866,7 @@ populate_lr_context(struct intel_context *ce,
         * The second page of the context object contains some registers which
         * must be set up prior to the first execution.
         */
-       execlists_init_reg_state(vaddr + LRC_STATE_PN * PAGE_SIZE,
+       execlists_init_reg_state(vaddr + LRC_STATE_OFFSET,
                                 ce, engine, ring, inhibit);
 
        ret = 0;

diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.h b/drivers/gpu/drm/i915/gt/intel_lrc.h
index dfbc214e14f5feab5b634876fc55c3c675d24c5f..91fd8e452d9bb12d9df65092cb16561fc47e543e 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_lrc.h
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.h
@@ -90,6 +90,7 @@ int intel_execlists_submission_setup(struct intel_engine_cs *engine);
 #define LRC_PPHWSP_SZ  (1)
 /* After the PPHWSP we have the logical state for the context */
 #define LRC_STATE_PN   (LRC_PPHWSP_PN + LRC_PPHWSP_SZ)
+#define LRC_STATE_OFFSET (LRC_STATE_PN * PAGE_SIZE)
 
 /* Space within PPHWSP reserved to be used as scratch */
 #define LRC_PPHWSP_SCRATCH             0x34

diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
index ae0a0a692498946493103031949761235161a7c9..e964c1402d299c5d997c4a7861ae0afa3dce69b6 100644 (file)
--- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
@@ -4458,7 +4458,7 @@ static int live_lrc_layout(void *arg)
                        err = PTR_ERR(hw);
                        break;
                }
-               hw += LRC_STATE_PN * PAGE_SIZE / sizeof(*hw);
+               hw += LRC_STATE_OFFSET / sizeof(*hw);
 
                execlists_init_reg_state(memset(lrc, POISON_INUSE, PAGE_SIZE),
                                         engine->kernel_context,
@@ -4626,7 +4626,7 @@ static int live_lrc_fixed(void *arg)
                        err = PTR_ERR(hw);
                        break;
                }
-               hw += LRC_STATE_PN * PAGE_SIZE / sizeof(*hw);
+               hw += LRC_STATE_OFFSET / sizeof(*hw);
 
                for (t = tbl; t->name; t++) {
                        int dw = find_offset(hw, t->reg);
@@ -5212,7 +5212,7 @@ store_context(struct intel_context *ce, struct i915_vma *scratch)
        x = 0;
        dw = 0;
        hw = ce->engine->pinned_default_state;
-       hw += LRC_STATE_PN * PAGE_SIZE / sizeof(*hw);
+       hw += LRC_STATE_OFFSET / sizeof(*hw);
        do {
                u32 len = hw[dw] & 0x7f;
 
@@ -5365,7 +5365,7 @@ static struct i915_vma *load_context(struct intel_context *ce, u32 poison)
 
        dw = 0;
        hw = ce->engine->pinned_default_state;
-       hw += LRC_STATE_PN * PAGE_SIZE / sizeof(*hw);
+       hw += LRC_STATE_OFFSET / sizeof(*hw);
        do {
                u32 len = hw[dw] & 0x7f;
 
@@ -5489,12 +5489,12 @@ static int compare_isolation(struct intel_engine_cs *engine,
                err = PTR_ERR(lrc);
                goto err_B1;
        }
-       lrc += LRC_STATE_PN * PAGE_SIZE / sizeof(*hw);
+       lrc += LRC_STATE_OFFSET / sizeof(*hw);
 
        x = 0;
        dw = 0;
        hw = engine->pinned_default_state;
-       hw += LRC_STATE_PN * PAGE_SIZE / sizeof(*hw);
+       hw += LRC_STATE_OFFSET / sizeof(*hw);
        do {
                u32 len = hw[dw] & 0x7f;
 
@@ -5736,7 +5736,7 @@ static struct i915_request *garbage(struct intel_context *ce,
        prandom_bytes_state(prng,
                            ce->lrc_reg_state,
                            ce->engine->context_size -
-                           LRC_STATE_PN * PAGE_SIZE);
+                           LRC_STATE_OFFSET);
 
        rq = intel_context_create_request(ce);
        if (IS_ERR(rq)) {

diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 5cde3e4e7be600b32a7970f69aa5ce5c107cb4b6..dec1b33e4da8804aecd17f5d655510735a2b9eb1 100644 (file)
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -2098,7 +2098,7 @@ gen8_store_flex(struct i915_request *rq,
        if (IS_ERR(cs))
                return PTR_ERR(cs);
 
-       offset = i915_ggtt_offset(ce->state) + LRC_STATE_PN * PAGE_SIZE;
+       offset = i915_ggtt_offset(ce->state) + LRC_STATE_OFFSET;
        do {
                *cs++ = MI_STORE_DWORD_IMM_GEN4 | MI_USE_GGTT;
                *cs++ = offset + flex->offset * sizeof(u32);