CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP717]),
        CLKDEV_DEV_ID("sh-sci.9", &mstp_clks[MSTP716]),
        CLKDEV_DEV_ID("e6508000.i2c", &mstp_clks[MSTP931]),
+       CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP931]),
        CLKDEV_DEV_ID("e6518000.i2c", &mstp_clks[MSTP930]),
+       CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP930]),
        CLKDEV_DEV_ID("e6530000.i2c", &mstp_clks[MSTP929]),
+       CLKDEV_DEV_ID("i2c-rcar.2", &mstp_clks[MSTP929]),
        CLKDEV_DEV_ID("e6540000.i2c", &mstp_clks[MSTP928]),
+       CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP928]),
        CLKDEV_DEV_ID("r8a7790-ether", &mstp_clks[MSTP813]),
        CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
        CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
 
                &r8a7790_gpio##idx##_platform_data,                     \
                sizeof(r8a7790_gpio##idx##_platform_data))
 
+static struct resource i2c_resources[] __initdata = {
+       /* I2C0 */
+       DEFINE_RES_MEM(0xE6508000, 0x40),
+       DEFINE_RES_IRQ(gic_spi(287)),
+       /* I2C1 */
+       DEFINE_RES_MEM(0xE6518000, 0x40),
+       DEFINE_RES_IRQ(gic_spi(288)),
+       /* I2C2 */
+       DEFINE_RES_MEM(0xE6530000, 0x40),
+       DEFINE_RES_IRQ(gic_spi(286)),
+       /* I2C3 */
+       DEFINE_RES_MEM(0xE6540000, 0x40),
+       DEFINE_RES_IRQ(gic_spi(290)),
+
+};
+
+#define r8a7790_register_i2c(idx)              \
+       platform_device_register_simple(        \
+               "i2c-rcar", idx,                \
+               i2c_resources + (2 * idx), 2);  \
+
 void __init r8a7790_pinmux_init(void)
 {
        platform_device_register_simple("pfc-r8a7790", -1, pfc_resources,
        r8a7790_register_gpio(3);
        r8a7790_register_gpio(4);
        r8a7790_register_gpio(5);
+       r8a7790_register_i2c(0);
+       r8a7790_register_i2c(1);
+       r8a7790_register_i2c(2);
+       r8a7790_register_i2c(3);
 }
 
 #define SCIF_COMMON(scif_type, baseaddr, irq)                  \