{
        struct amdgpu_ras *ras =
                container_of(work, struct amdgpu_ras, recovery_work);
+       struct amdgpu_device *remote_adev = NULL;
+       struct amdgpu_device *adev = ras->adev;
+       struct list_head device_list, *device_list_handle =  NULL;
+       struct amdgpu_hive_info *hive = amdgpu_get_xgmi_hive(adev, false);
+
+       /* Build list of devices to query RAS related errors */
+       if  (hive && adev->gmc.xgmi.num_physical_nodes > 1) {
+               device_list_handle = &hive->device_list;
+       } else {
+               list_add_tail(&adev->gmc.xgmi.head, &device_list);
+               device_list_handle = &device_list;
+       }
 
-       /*
-        * Query and print non zero error counter per IP block for
-        * awareness before recovering GPU.
-        */
-       amdgpu_ras_log_on_err_counter(ras->adev);
+       list_for_each_entry(remote_adev, device_list_handle, gmc.xgmi.head) {
+               amdgpu_ras_log_on_err_counter(remote_adev);
+       }
 
        if (amdgpu_device_should_recover_gpu(ras->adev))
                amdgpu_device_gpu_recover(ras->adev, 0);