Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM DT updates from Olof Johansson:
 "Ladies and gentlemen, we proudly announce to you the latest branch of
  ARM device tree contents for the mainline kernel.  Come and see, come
  and see!

  No less than twentythree thousand lines of additions! Just imagine the
  joy you will have of using your mainline kernel on newly supported
  hardware such as Rockchip Chromebooks, Freescale i.MX6UL boards or
  UniPhier hardware!

  For those of you feeling less adventurous, added hardware support on
  platforms such as TI DM814x and Gumstix Overo platforms might be more
  of your liking.

  We've got something for everyone here!

  Ahem.  Cough.  So, anyway...

  This is the usual large batch of DT updates.  Lots and lots of smaller
  changes, some of the larger ones to point out are:

   - Rockchip veyron (Chromebook) support, as well as several other new boards
   - DRM support on Atmel AT91SAM9N12EK
   - USB additions on some Allwinner platforms
   - Mediatek MT6580 support
   - Freescale i.MX6UL support
   - cleanups for Renesas shmobile platforms
   - lots of added devices on LPC18xx
   - lots of added devices and boards on UniPhier

  There's also some dependent code added here, in particular some
  branches that are primarily merged through the clock tree"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (389 commits)
  ARM: tegra: Add gpio-ranges property
  ARM: tegra: Fix AHB base address on Tegra20, Tegra30 and Tegra114
  ARM: tegra: Add Tegra124 PMU support
  ARM: tegra: jetson-tk1: Add GK20A GPU DT node
  ARM: tegra: venice2: Add GK20A GPU DT node
  ARM: tegra: Add IOMMU node to GK20A
  ARM: tegra: Add CPU regulator to the Jetson TK1 device tree
  ARM: tegra: Add entries for cpufreq on Tegra124
  ARM: tegra: Enable the DFLL on the Jetson TK1
  ARM: tegra: Add the DFLL to Tegra124 device tree
  ARM: dts: zynq: Add devicetree entry for Xilinx Zynq reset controller.
  ARM: dts: UniPhier: fix PPI interrupt CPU mask of timer nodes
  ARM: dts: rockchip: correct regulator power states for suspend
  ARM: dts: rockchip: correct regulator PM properties
  ARM: dts: vexpress: Use assigned-clock-parents for sp810
  pinctrl: tegra: Only set the gpio range if needed
  arm: boot: dts: am4372: add ARM timers and SCU nodes
  ARM: dts: AM4372: Add the am4372-rtc compatible string
  ARM: shmobile: r8a7794 dtsi: Add CPG/MSTP Clock Domain
  ARM: shmobile: r8a7793 dtsi: Add CPG/MSTP Clock Domain
  ...

diff --cc Documentation/devicetree/bindings/arm/atmel-at91.txt
index 23c097812d9886696e3e8842d29d2127d704b083,dc2d0f06d05806e20990c606ba60503ce864c16b..7fd64ec9ee1d5dcf78f1c1ff241a7b39f31da4f6
--- 1/Documentation/devicetree/bindings/arm/atmel-at91.txt
--- 2/Documentation/devicetree/bindings/arm/atmel-at91.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-at91.txt
@@@ -89,8 -88,9 +90,9 @@@ One interrupt per TC channel in a TC bl
  
  RSTC Reset Controller required properties:
  - compatible: Should be "atmel,<chip>-rstc".
 -  <chip> can be "at91sam9260" or "at91sam9g45"
 +  <chip> can be "at91sam9260" or "at91sam9g45" or "sama5d3"
  - reg: Should contain registers location and length
+ - clocks: phandle to input clock.
  
  Example:
  

diff --cc arch/arm/boot/dts/Makefile
Simple merge

diff --cc arch/arm/boot/dts/am33xx.dtsi
Simple merge

diff --cc arch/arm/boot/dts/am4372.dtsi
Simple merge

diff --cc arch/arm/boot/dts/am57xx-beagle-x15.dts
Simple merge

diff --cc arch/arm/boot/dts/dra7-evm.dts
Simple merge

diff --cc arch/arm/boot/dts/dra7.dtsi
Simple merge

diff --cc arch/arm/boot/dts/dra72-evm.dts
Simple merge

diff --cc arch/arm/boot/dts/imx27.dtsi
Simple merge

diff --cc arch/arm/boot/dts/imx53-qsb-common.dtsi
Simple merge

diff --cc arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
index 4493f6e993301da96edefaac1334372cd18cf4c7,b8e35513aed28eaa504ff1ff77ef2b552f37ce27..1b66328a84987a1040b0406e1b4dfe29a87707ed
--- 1/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
--- 2/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
@@@ -316,10 -316,13 +316,13 @@@
  };
  
  &usdhc3 {
-       pinctrl-names = "default";
+       pinctrl-names = "default", "state_100mhz", "state_200mhz";
        pinctrl-0 = <&pinctrl_usdhc3>;
 -      cd-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
+       pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
+       pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
 +      cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
        vmmc-supply = <&reg_3p3v>;
+       no-1-8-v; /* firmware will remove if board revision supports */
        status = "okay";
  };
  

diff --cc arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
index a857d1294609a0a0670a7d3f92e446e92185b743,765c3a758ae02d632bb5a49aa5bd952429af3366..7c51839ff93467d209e0f3809b3ed9e8bc541c54
--- 1/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
--- 2/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
@@@ -322,10 -322,13 +322,13 @@@
  };
  
  &usdhc3 {
-       pinctrl-names = "default";
+       pinctrl-names = "default", "state_100mhz", "state_200mhz";
        pinctrl-0 = <&pinctrl_usdhc3>;
 -      cd-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
+       pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
+       pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
 +      cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
        vmmc-supply = <&reg_3p3v>;
+       no-1-8-v; /* firmware will remove if board revision supports */
        status = "okay";
  };
  

diff --cc arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
index 1afe3385e2d283b7a9a2da84e37ca595ce04c13f,1100aab4be54ab8d54384165869466a12464ed88..929e0b37bd9e542e252be1159e6e588dd34b94e1
--- 1/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
--- 2/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
@@@ -415,10 -415,13 +415,13 @@@
  };
  
  &usdhc3 {
-       pinctrl-names = "default";
+       pinctrl-names = "default", "state_100mhz", "state_200mhz";
        pinctrl-0 = <&pinctrl_usdhc3>;
 -      cd-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
+       pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
+       pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
 +      cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
        vmmc-supply = <&reg_3p3v>;
+       no-1-8-v; /* firmware will remove if board revision supports */
        status = "okay";
  };
  

diff --cc arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
Simple merge

diff --cc arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
Simple merge

diff --cc arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
Simple merge

diff --cc arch/arm/boot/dts/imx6qdl-sabresd.dtsi
Simple merge

diff --cc arch/arm/boot/dts/imx6qdl.dtsi
Simple merge

diff --cc arch/arm/boot/dts/imx6sx.dtsi
Simple merge

diff --cc arch/arm/boot/dts/omap3-overo-common-lcd35.dtsi
index df8908adb0cbf2e0c1784559c181345892d36a85,b874eb774f66e8b4d49ad9299b49ef7a99a09513..80d236ac64a5db209ecb9c69ddcf8aa483c39bad
--- 1/arch/arm/boot/dts/omap3-overo-common-lcd35.dtsi
--- 2/arch/arm/boot/dts/omap3-overo-common-lcd35.dtsi
+++ b/arch/arm/boot/dts/omap3-overo-common-lcd35.dtsi
@@@ -120,10 -121,10 +121,10 @@@
  
        lcd0: display@0 {
                compatible = "lgphilips,lb035q02";
 -              label = "lcd";
 +              label = "lcd35";
  
                reg = <1>;                                      /* CS1 */
-               spi-max-frequency = <10000000>;
+               spi-max-frequency = <500000>;
                spi-cpol;
                spi-cpha;
  

diff --cc arch/arm/boot/dts/omap5.dtsi
Simple merge

diff --cc arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
Simple merge

diff --cc arch/arm/boot/dts/stih407-family.dtsi
Simple merge

diff --cc arch/arm/boot/dts/sun4i-a10.dtsi
Simple merge

diff --cc arch/arm/boot/dts/sun5i.dtsi
Simple merge

diff --cc arch/arm/boot/dts/sun6i-a31.dtsi
Simple merge

diff --cc arch/arm/boot/dts/sun7i-a20.dtsi
Simple merge

diff --cc arch/arm/boot/dts/sun8i-a23-a33.dtsi
Simple merge

diff --cc arch/arm/mach-omap2/pdata-quirks.c
Simple merge

diff --cc drivers/clk/ti/clk-43xx.c
Simple merge