nvme_identify_ctrl;
nvme_identify_ctrl_list;
nvme_identify_domain_list;
+ nvme_identify_endurance_group_list;
nvme_identify_independent_identify_ns;
nvme_identify_iocs;
nvme_identify_ns;
domid, NVME_UUID_NONE, NVME_CSI_NVM, list);
}
+int nvme_identify_endurance_group_list(int fd, __u16 endgrp_id,
+ struct nvme_id_endurance_group_list *list)
+{
+ BUILD_ASSERT(sizeof(struct nvme_id_endurance_group_list) == 4096);
+ return nvme_identify(fd, NVME_IDENTIFY_CNS_ENDURANCE_GROUP_ID,
+ NVME_NSID_NONE, NVME_CNTLID_NONE,
+ NVME_NVMSETID_NONE, endgrp_id, NVME_UUID_NONE,
+ NVME_CSI_NVM, list);
+}
+
int nvme_identify_independent_identify_ns(int fd, __u32 nsid,
struct nvme_id_independent_id_ns *ns)
{
int nvme_identify_domain_list(int fd, __u16 domid,
struct nvme_id_domain_list *list);
+/**
+ * nvme_identifiy_endurance_group_list() -
+ * @fd: File descriptor of nvme device
+ * @endgrp_id: Endurance group identifier
+ * @list: Array of endurance group identifiers
+ *
+ * Return: The nvme command status if a response was received (see
+ * &enum nvme_status_field) or -1 with errno set otherwise.
+ */
+int nvme_identify_endurance_group_list(int fd, __u16 endgrp_id,
+ struct nvme_id_endurance_group_list *list);
+
/**
* nvme_identify_iocs() -
* @fd: File descriptor of nvme device
NVME_ID_NS_LIST_MAX = 1024,
NVME_ID_SECONDARY_CTRL_MAX = 127,
NVME_ID_DOMAIN_LIST_MAX = 31,
+ NVME_ID_ENDURANCE_GROUP_LIST_MAX = 2047,
NVME_ID_ND_DESCRIPTOR_MAX = 16,
NVME_FEAT_LBA_RANGE_MAX = 64,
NVME_LOG_ST_MAX_RESULTS = 20,
struct nvme_id_domain_attr domain_attr[NVME_ID_DOMAIN_LIST_MAX];
};
+/**
+ * struct nvme_id_endurance_group_list -
+ * @num:
+ * @identifier:
+ */
+struct nvme_id_endurance_group_list {
+ __le16 num;
+ __le16 identifier[NVME_ID_ENDURANCE_GROUP_LIST_MAX];
+};
+
/**
* struct nvme_supported_log_pages -
* @lid_support:
* @NVME_IDENTIFY_CNS_NS_GRANULARITY:
* @NVME_IDENTIFY_CNS_UUID_LIST:
* @NVME_IDENTIFY_CNS_DOMAIN_LIST:
+ * @NVME_IDENTIFY_CNS_ENDURANCE_GROUP_ID:
* @NVME_IDENTIFY_CNS_CSI_ALLOCATED_NS_LIST:
* @NVME_IDENTIFY_CNS_COMMAND_SET_STRUCTURE: Base Specification 2.0a section 5.17.2.21
*/
NVME_IDENTIFY_CNS_NS_GRANULARITY = 0x16,
NVME_IDENTIFY_CNS_UUID_LIST = 0x17,
NVME_IDENTIFY_CNS_DOMAIN_LIST = 0x18,
+ NVME_IDENTIFY_CNS_ENDURANCE_GROUP_ID = 0x19,
NVME_IDENTIFY_CNS_CSS_ALLOCATED_NS_LIST = 0x1A,
NVME_IDENTIFY_CNS_COMMAND_SET_STRUCTURE = 0x1C,
};