#include "sun8i_csc.h"
 #include "sun8i_mixer.h"
 
-static const u32 ccsc_base[2][2] = {
-       {CCSC00_OFFSET, CCSC01_OFFSET},
-       {CCSC10_OFFSET, CCSC11_OFFSET},
+static const u32 ccsc_base[][2] = {
+       [CCSC_MIXER0_LAYOUT]    = {CCSC00_OFFSET, CCSC01_OFFSET},
+       [CCSC_MIXER1_LAYOUT]    = {CCSC10_OFFSET, CCSC11_OFFSET},
+       [CCSC_D1_MIXER0_LAYOUT] = {CCSC00_OFFSET, CCSC01_D1_OFFSET},
 };
 
 /*
 
 /* VI channel CSC units offsets */
 #define CCSC00_OFFSET 0xAA050
 #define CCSC01_OFFSET 0xFA050
+#define CCSC01_D1_OFFSET 0xFA000
 #define CCSC10_OFFSET 0xA0000
 #define CCSC11_OFFSET 0xF0000
 
 
 }
 
 static const struct sun8i_mixer_cfg sun8i_a83t_mixer0_cfg = {
-       .ccsc           = 0,
+       .ccsc           = CCSC_MIXER0_LAYOUT,
        .scaler_mask    = 0xf,
        .scanline_yuv   = 2048,
        .ui_num         = 3,
 };
 
 static const struct sun8i_mixer_cfg sun8i_a83t_mixer1_cfg = {
-       .ccsc           = 1,
+       .ccsc           = CCSC_MIXER1_LAYOUT,
        .scaler_mask    = 0x3,
        .scanline_yuv   = 2048,
        .ui_num         = 1,
 };
 
 static const struct sun8i_mixer_cfg sun8i_h3_mixer0_cfg = {
-       .ccsc           = 0,
+       .ccsc           = CCSC_MIXER0_LAYOUT,
        .mod_rate       = 432000000,
        .scaler_mask    = 0xf,
        .scanline_yuv   = 2048,
 };
 
 static const struct sun8i_mixer_cfg sun8i_r40_mixer0_cfg = {
-       .ccsc           = 0,
+       .ccsc           = CCSC_MIXER0_LAYOUT,
        .mod_rate       = 297000000,
        .scaler_mask    = 0xf,
        .scanline_yuv   = 2048,
 };
 
 static const struct sun8i_mixer_cfg sun8i_r40_mixer1_cfg = {
-       .ccsc           = 1,
+       .ccsc           = CCSC_MIXER1_LAYOUT,
        .mod_rate       = 297000000,
        .scaler_mask    = 0x3,
        .scanline_yuv   = 2048,
        .ui_num = 1,
        .scaler_mask = 0x3,
        .scanline_yuv = 2048,
-       .ccsc = 0,
+       .ccsc = CCSC_MIXER0_LAYOUT,
        .mod_rate = 150000000,
 };
 
 static const struct sun8i_mixer_cfg sun50i_a64_mixer0_cfg = {
-       .ccsc           = 0,
+       .ccsc           = CCSC_MIXER0_LAYOUT,
        .mod_rate       = 297000000,
        .scaler_mask    = 0xf,
        .scanline_yuv   = 4096,
 };
 
 static const struct sun8i_mixer_cfg sun50i_a64_mixer1_cfg = {
-       .ccsc           = 1,
+       .ccsc           = CCSC_MIXER1_LAYOUT,
        .mod_rate       = 297000000,
        .scaler_mask    = 0x3,
        .scanline_yuv   = 2048,
 };
 
 static const struct sun8i_mixer_cfg sun50i_h6_mixer0_cfg = {
-       .ccsc           = 0,
+       .ccsc           = CCSC_MIXER0_LAYOUT,
        .is_de3         = true,
        .mod_rate       = 600000000,
        .scaler_mask    = 0xf,
 
 #define SUN50I_MIXER_CDC0_EN                   0xd0000
 #define SUN50I_MIXER_CDC1_EN                   0xd8000
 
+enum {
+       /* First mixer or second mixer with VEP support. */
+       CCSC_MIXER0_LAYOUT,
+       /* Second mixer without VEP support. */
+       CCSC_MIXER1_LAYOUT,
+       /* First mixer with the MMIO layout found in the D1 SoC. */
+       CCSC_D1_MIXER0_LAYOUT,
+};
+
 /**
  * struct sun8i_mixer_cfg - mixer HW configuration
  * @vi_num: number of VI channels
  *     First, scaler supports for VI channels is defined and after that, scaler
  *     support for UI channels. For example, if mixer has 2 VI channels without
  *     scaler and 2 UI channels with scaler, bitmask would be 0xC.
- * @ccsc: select set of CCSC base addresses
- *     Set value to 0 if this is first mixer or second mixer with VEP support.
- *     Set value to 1 if this is second mixer without VEP support. Other values
- *     are invalid.
+ * @ccsc: select set of CCSC base addresses from the enumeration above.
  * @mod_rate: module clock rate that needs to be set in order to have
  *     a functional block.
  * @is_de3: true, if this is next gen display engine 3.0, false otherwise.