drm/amdgpu: add print support for gfx9_4_3 ipdump

Add support of gfx9_4_3 ipdump print so devcoredump
could trigger it to dump the captured registers
in devcoredump.

Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
index 3bd84acba643f011a5e407b64bce3b08f73690a6..59417feac9a5d2e81507be7d27dfcad38817d1b3 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
@@ -4304,6 +4304,28 @@ static void gfx_v9_4_3_ring_insert_nop(struct amdgpu_ring *ring, uint32_t num_no
                amdgpu_ring_write(ring, ring->funcs->nop);
 }
 
+static void gfx_v9_4_3_ip_print(void *handle, struct drm_printer *p)
+{
+       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       uint32_t i;
+       uint32_t xcc_id, xcc_offset, num_xcc;
+       uint32_t reg_count = ARRAY_SIZE(gc_reg_list_9_4_3);
+
+       if (!adev->gfx.ip_dump_core)
+               return;
+
+       num_xcc = NUM_XCC(adev->gfx.xcc_mask);
+       drm_printf(p, "Number of Instances:%d\n", num_xcc);
+       for (xcc_id = 0; xcc_id < num_xcc; xcc_id++) {
+               xcc_offset = xcc_id * reg_count;
+               drm_printf(p, "\nInstance id:%d\n", xcc_id);
+               for (i = 0; i < reg_count; i++)
+                       drm_printf(p, "%-50s \t 0x%08x\n",
+                                  gc_reg_list_9_4_3[i].reg_name,
+                                  adev->gfx.ip_dump_core[xcc_offset + i]);
+       }
+}
+
 static void gfx_v9_4_3_ip_dump(void *handle)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
@@ -4344,7 +4366,7 @@ static const struct amd_ip_funcs gfx_v9_4_3_ip_funcs = {
        .set_powergating_state = gfx_v9_4_3_set_powergating_state,
        .get_clockgating_state = gfx_v9_4_3_get_clockgating_state,
        .dump_ip_state = gfx_v9_4_3_ip_dump,
-       .print_ip_state = NULL,
+       .print_ip_state = gfx_v9_4_3_ip_print,
 };
 
 static const struct amdgpu_ring_funcs gfx_v9_4_3_ring_funcs_compute = {