drm/amdgpu/pm: Add support for MACO flag checking

Add support for MACO flag checking.
MACO mode only works if BACO is supported.

Signed-off-by: Ma Jun <Jun.Ma2@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index b3b84647207ed47463e004e2c72745c6120857d1..65c17c59c152d077336d89ba5eb20fd7e3c3fe3e 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -606,7 +606,7 @@ struct amdgpu_asic_funcs {
        /* PCIe replay counter */
        uint64_t (*get_pcie_replay_count)(struct amdgpu_device *adev);
        /* device supports BACO */
-       bool (*supports_baco)(struct amdgpu_device *adev);
+       int (*supports_baco)(struct amdgpu_device *adev);
        /* pre asic_init quirks */
        void (*pre_asic_init)(struct amdgpu_device *adev);
        /* enter/exit umd stable pstate */
@@ -1408,7 +1408,7 @@ bool amdgpu_device_supports_atpx(struct drm_device *dev);
 bool amdgpu_device_supports_px(struct drm_device *dev);
 bool amdgpu_device_supports_boco(struct drm_device *dev);
 bool amdgpu_device_supports_smart_shift(struct drm_device *dev);
-bool amdgpu_device_supports_baco(struct drm_device *dev);
+int amdgpu_device_supports_baco(struct drm_device *dev);
 bool amdgpu_device_is_peer_accessible(struct amdgpu_device *adev,
                                      struct amdgpu_device *peer_adev);
 int amdgpu_device_baco_enter(struct drm_device *dev);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index ed34c4893108fcdf357edf75ceaa5cc7fa8c865a..f830024cffca7696b2a666555773345287247599 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -338,10 +338,12 @@ bool amdgpu_device_supports_boco(struct drm_device *dev)
  *
  * @dev: drm_device pointer
  *
- * Returns true if the device supporte BACO,
- * otherwise return false.
+ * Return:
+ * 1 if the device supporte BACO;
+ * 3 if the device support MACO (only works if BACO is supported)
+ * otherwise return 0.
  */
-bool amdgpu_device_supports_baco(struct drm_device *dev)
+int amdgpu_device_supports_baco(struct drm_device *dev)
 {
        struct amdgpu_device *adev = drm_to_adev(dev);
 

diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c b/drivers/gpu/drm/amd/amdgpu/cik.c
index a3a643254d7af8df666fc93594393e1aa8931da6..fdbc26346b54dbf0bf39bac5bf7cd67fc1afc39e 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/cik.c
+++ b/drivers/gpu/drm/amd/amdgpu/cik.c
@@ -1375,14 +1375,14 @@ static int cik_asic_pci_config_reset(struct amdgpu_device *adev)
        return r;
 }
 
-static bool cik_asic_supports_baco(struct amdgpu_device *adev)
+static int cik_asic_supports_baco(struct amdgpu_device *adev)
 {
        switch (adev->asic_type) {
        case CHIP_BONAIRE:
        case CHIP_HAWAII:
                return amdgpu_dpm_is_baco_supported(adev);
        default:
-               return false;
+               return 0;
        }
 }
 

diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c
index 23e4ef4fff7cd553482567b7e708a1bef4365822..67e179c7e3476ec5777d444b332664e6fba969d0 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/si.c
+++ b/drivers/gpu/drm/amd/amdgpu/si.c
@@ -1409,9 +1409,9 @@ static int si_gpu_pci_config_reset(struct amdgpu_device *adev)
        return r;
 }
 
-static bool si_asic_supports_baco(struct amdgpu_device *adev)
+static int si_asic_supports_baco(struct amdgpu_device *adev)
 {
-       return false;
+       return 0;
 }
 
 static enum amd_reset_method

diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index dec81ccf6240813f238ed07b87a1433baf2bb837..c8abbf5da736266dc92ff370b2722f49b87a5324 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -502,7 +502,7 @@ static int soc15_asic_baco_reset(struct amdgpu_device *adev)
 static enum amd_reset_method
 soc15_asic_reset_method(struct amdgpu_device *adev)
 {
-       bool baco_reset = false;
+       int baco_reset = 0;
        bool connected_to_cpu = false;
        struct amdgpu_ras *ras = amdgpu_ras_get_context(adev);
 
@@ -540,7 +540,7 @@ soc15_asic_reset_method(struct amdgpu_device *adev)
                         */
                        if (ras && adev->ras_enabled &&
                            adev->pm.fw_version <= 0x283400)
-                               baco_reset = false;
+                               baco_reset = 0;
                } else {
                        baco_reset = amdgpu_dpm_is_baco_supported(adev);
                }
@@ -620,7 +620,7 @@ static int soc15_asic_reset(struct amdgpu_device *adev)
        }
 }
 
-static bool soc15_supports_baco(struct amdgpu_device *adev)
+static int soc15_supports_baco(struct amdgpu_device *adev)
 {
        switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
        case IP_VERSION(9, 0, 0):
@@ -628,13 +628,13 @@ static bool soc15_supports_baco(struct amdgpu_device *adev)
                if (adev->asic_type == CHIP_VEGA20) {
                        if (adev->psp.sos.fw_version >= 0x80067)
                                return amdgpu_dpm_is_baco_supported(adev);
-                       return false;
+                       return 0;
                } else {
                        return amdgpu_dpm_is_baco_supported(adev);
                }
                break;
        default:
-               return false;
+               return 0;
        }
 }
 

diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index 1a98812981f42ca02b9641354bcd0776247ccc21..2415355b037cce47e36e1169dd108c04ec4e1eec 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -897,7 +897,7 @@ static int vi_asic_pci_config_reset(struct amdgpu_device *adev)
        return r;
 }
 
-static bool vi_asic_supports_baco(struct amdgpu_device *adev)
+static int vi_asic_supports_baco(struct amdgpu_device *adev)
 {
        switch (adev->asic_type) {
        case CHIP_FIJI:
@@ -908,14 +908,14 @@ static bool vi_asic_supports_baco(struct amdgpu_device *adev)
        case CHIP_TOPAZ:
                return amdgpu_dpm_is_baco_supported(adev);
        default:
-               return false;
+               return 0;
        }
 }
 
 static enum amd_reset_method
 vi_asic_reset_method(struct amdgpu_device *adev)
 {
-       bool baco_reset;
+       int baco_reset;
 
        if (amdgpu_reset_method == AMD_RESET_METHOD_LEGACY ||
            amdgpu_reset_method == AMD_RESET_METHOD_BACO)
@@ -935,7 +935,7 @@ vi_asic_reset_method(struct amdgpu_device *adev)
                baco_reset = amdgpu_dpm_is_baco_supported(adev);
                break;
        default:
-               baco_reset = false;
+               baco_reset = 0;
                break;
        }
 

diff --git a/drivers/gpu/drm/amd/include/kgd_pp_interface.h b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
index afb930b706154ab2fc7e1f3e9414107817f0fa6d..805c9d37a2b4e470ae2deaf958998f61405dc8be 100644 (file)
--- a/drivers/gpu/drm/amd/include/kgd_pp_interface.h
+++ b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
@@ -421,7 +421,7 @@ struct amd_pm_funcs {
        int (*set_hard_min_dcefclk_by_freq)(void *handle, uint32_t clock);
        int (*set_hard_min_fclk_by_freq)(void *handle, uint32_t clock);
        int (*set_min_deep_sleep_dcefclk)(void *handle, uint32_t clock);
-       bool (*get_asic_baco_capability)(void *handle);
+       int (*get_asic_baco_capability)(void *handle);
        int (*get_asic_baco_state)(void *handle, int *state);
        int (*set_asic_baco_state)(void *handle, int state);
        int (*get_ppfeature_status)(void *handle, char *buf);

diff --git a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
index f84bfed5068179825337068d67f5203f70ca5db0..eee919577b443f648ef37ccfff3f9ab8ff8af0d5 100644 (file)
--- a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
@@ -199,14 +199,14 @@ int amdgpu_dpm_notify_rlc_state(struct amdgpu_device *adev, bool en)
        return ret;
 }
 
-bool amdgpu_dpm_is_baco_supported(struct amdgpu_device *adev)
+int amdgpu_dpm_is_baco_supported(struct amdgpu_device *adev)
 {
        const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;
        void *pp_handle = adev->powerplay.pp_handle;
-       bool ret;
+       int ret;
 
        if (!pp_funcs || !pp_funcs->get_asic_baco_capability)
-               return false;
+               return 0;
        /* Don't use baco for reset in S3.
         * This is a workaround for some platforms
         * where entering BACO during suspend
@@ -217,7 +217,7 @@ bool amdgpu_dpm_is_baco_supported(struct amdgpu_device *adev)
         * devices.  Needs more investigation.
         */
        if (adev->in_s3)
-               return false;
+               return 0;
 
        mutex_lock(&adev->pm.mutex);
 

diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h b/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h
index e6cad9f7aaebbfed93b22fce761de450a7c5baef..501f8c726e8d7b0c3e37f60988e52612c01a2083 100644 (file)
--- a/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h
+++ b/drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h
@@ -411,7 +411,7 @@ int amdgpu_dpm_baco_reset(struct amdgpu_device *adev);
 int amdgpu_dpm_mode2_reset(struct amdgpu_device *adev);
 int amdgpu_dpm_enable_gfx_features(struct amdgpu_device *adev);
 
-bool amdgpu_dpm_is_baco_supported(struct amdgpu_device *adev);
+int amdgpu_dpm_is_baco_supported(struct amdgpu_device *adev);
 
 bool amdgpu_dpm_is_mode1_reset_supported(struct amdgpu_device *adev);
 int amdgpu_dpm_mode1_reset(struct amdgpu_device *adev);

diff --git a/drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c
index 581dadfd13f9b84841a8b0e080eefe66b9c2789b..133d1ee6e67c2cb9fad6f858e8d7e96df3f8d439 100644 (file)
--- a/drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c
@@ -1371,7 +1371,7 @@ static int pp_set_active_display_count(void *handle, uint32_t count)
        return phm_set_active_display_count(hwmgr, count);
 }
 
-static bool pp_get_asic_baco_capability(void *handle)
+static int pp_get_asic_baco_capability(void *handle)
 {
        struct pp_hwmgr *hwmgr = handle;
 

diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_baco.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_baco.c
index 8490614e2d7e9ea4cdac560106af9d3453d9d002..ad60918aaae1ce1708ae42fd5bb457bcb6c93c99 100644 (file)
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_baco.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_baco.c
@@ -33,7 +33,7 @@
 #include "smu/smu_7_1_2_d.h"
 #include "smu/smu_7_1_2_sh_mask.h"
 
-bool smu7_get_bamaco_support(struct pp_hwmgr *hwmgr)
+int smu7_get_bamaco_support(struct pp_hwmgr *hwmgr)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev);
        uint32_t reg;
@@ -44,9 +44,9 @@ bool smu7_get_bamaco_support(struct pp_hwmgr *hwmgr)
        reg = RREG32(mmCC_BIF_BX_FUSESTRAP0);
 
        if (reg & CC_BIF_BX_FUSESTRAP0__STRAP_BIF_PX_CAPABLE_MASK)
-               return true;
+               return BACO_SUPPORT;
 
-       return false;
+       return 0;
 }
 
 int smu7_baco_get_state(struct pp_hwmgr *hwmgr, enum BACO_STATE *state)

diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_baco.h b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_baco.h
index 93df1b9dfbd93d20d059d83411d16373701413a6..750082ea74d8055a480b7aed4742bcbac10d785c 100644 (file)
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_baco.h
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_baco.h
@@ -25,7 +25,7 @@
 #include "hwmgr.h"
 #include "common_baco.h"
 
-extern bool smu7_get_bamaco_support(struct pp_hwmgr *hwmgr);
+extern int smu7_get_bamaco_support(struct pp_hwmgr *hwmgr);
 extern int smu7_baco_get_state(struct pp_hwmgr *hwmgr, enum BACO_STATE *state);
 extern int smu7_baco_set_state(struct pp_hwmgr *hwmgr, enum BACO_STATE state);
 

diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu9_baco.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu9_baco.c
index 938812d6b978946e7705a0ddf71b78b987a13425..c1ce1d7cae48e910c8b763f40b8ad47c69c67369 100644 (file)
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu9_baco.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu9_baco.c
@@ -28,13 +28,13 @@
 #include "vega10_inc.h"
 #include "smu9_baco.h"
 
-bool smu9_get_bamaco_support(struct pp_hwmgr *hwmgr)
+int smu9_get_bamaco_support(struct pp_hwmgr *hwmgr)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev);
        uint32_t reg, data;
 
        if (!phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_BACO))
-               return false;
+               return 0;
 
        WREG32(0x12074, 0xFFF0003B);
        data = RREG32(0x12075);
@@ -43,10 +43,10 @@ bool smu9_get_bamaco_support(struct pp_hwmgr *hwmgr)
                reg = RREG32_SOC15(NBIF, 0, mmRCC_BIF_STRAP0);
 
                if (reg & RCC_BIF_STRAP0__STRAP_PX_CAPABLE_MASK)
-                       return true;
+                       return BACO_SUPPORT;
        }
 
-       return false;
+       return 0;
 }
 
 int smu9_baco_get_state(struct pp_hwmgr *hwmgr, enum BACO_STATE *state)

diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu9_baco.h b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu9_baco.h
index 67a5cec8e6b50cd8320eaeaa4ac3274dd733a34a..2c100482084c92033ddfb78f66080fdebaccbf64 100644 (file)
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu9_baco.h
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu9_baco.h
@@ -25,7 +25,7 @@
 #include "hwmgr.h"
 #include "common_baco.h"
 
-extern bool smu9_get_bamaco_support(struct pp_hwmgr *hwmgr);
+extern int smu9_get_bamaco_support(struct pp_hwmgr *hwmgr);
 extern int smu9_baco_get_state(struct pp_hwmgr *hwmgr, enum BACO_STATE *state);
 
 #endif

diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.c
index 0d0523e046d466308925bcb21df0b06d3c14d508..424e4ec9e389f4160de93d2b815a1d2ab6d4876a 100644 (file)
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.c
@@ -36,22 +36,22 @@ static const struct soc15_baco_cmd_entry clean_baco_tbl[] = {
        {CMD_WRITE, SOC15_REG_ENTRY(NBIF, 0, mmBIOS_SCRATCH_7), 0, 0, 0, 0},
 };
 
-bool vega20_get_bamaco_support(struct pp_hwmgr *hwmgr)
+int vega20_get_bamaco_support(struct pp_hwmgr *hwmgr)
 {
        struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev);
        uint32_t reg;
 
        if (!phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_BACO))
-               return false;
+               return 0;
 
        if (((RREG32(0x17569) & 0x20000000) >> 29) == 0x1) {
                reg = RREG32_SOC15(NBIF, 0, mmRCC_BIF_STRAP0);
 
                if (reg & RCC_BIF_STRAP0__STRAP_PX_CAPABLE_MASK)
-                       return true;
+                       return BACO_SUPPORT;
        }
 
-       return false;
+       return 0;
 }
 
 int vega20_baco_get_state(struct pp_hwmgr *hwmgr, enum BACO_STATE *state)

diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.h b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.h
index a2c0f4e7813c1f9f6cdd2ccdc9d269b60356d232..0f2dd8c008ba9203f67030b9aa0fe907fb101fb4 100644 (file)
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.h
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_baco.h
@@ -25,7 +25,7 @@
 #include "hwmgr.h"
 #include "common_baco.h"
 
-extern bool vega20_get_bamaco_support(struct pp_hwmgr *hwmgr);
+extern int vega20_get_bamaco_support(struct pp_hwmgr *hwmgr);
 extern int vega20_baco_get_state(struct pp_hwmgr *hwmgr, enum BACO_STATE *state);
 extern int vega20_baco_set_state(struct pp_hwmgr *hwmgr, enum BACO_STATE state);
 extern int vega20_baco_apply_vdci_flush_workaround(struct pp_hwmgr *hwmgr);

diff --git a/drivers/gpu/drm/amd/pm/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/pm/powerplay/inc/hwmgr.h
index 5b3da41f159fe87fbaf807942531f2a0cebaed39..69928a4a074b637b6ad3ad228165325dc332066c 100644 (file)
--- a/drivers/gpu/drm/amd/pm/powerplay/inc/hwmgr.h
+++ b/drivers/gpu/drm/amd/pm/powerplay/inc/hwmgr.h
@@ -351,7 +351,7 @@ struct pp_hwmgr_func {
        int (*set_hard_min_fclk_by_freq)(struct pp_hwmgr *hwmgr, uint32_t clock);
        int (*set_hard_min_gfxclk_by_freq)(struct pp_hwmgr *hwmgr, uint32_t clock);
        int (*set_soft_max_gfxclk_by_freq)(struct pp_hwmgr *hwmgr, uint32_t clock);
-       bool (*get_bamaco_support)(struct pp_hwmgr *hwmgr);
+       int (*get_bamaco_support)(struct pp_hwmgr *hwmgr);
        int (*get_asic_baco_state)(struct pp_hwmgr *hwmgr, enum BACO_STATE *state);
        int (*set_asic_baco_state)(struct pp_hwmgr *hwmgr, enum BACO_STATE state);
        int (*get_ppfeature_status)(struct pp_hwmgr *hwmgr, char *buf);

diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index ed4285665ca3b7c3dfe4155854dbb8301f3a2dcc..dc2a864b0f5124d8d2c9ecd5474a9205824bb2d7 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -737,6 +737,7 @@ static int smu_early_init(void *handle)
        smu->is_apu = false;
        smu->smu_baco.state = SMU_BACO_STATE_NONE;
        smu->smu_baco.platform_support = false;
+       smu->smu_baco.maco_support = false;
        smu->user_dpm_profile.fan_mode = -1;
 
        mutex_init(&smu->message_lock);
@@ -3223,7 +3224,7 @@ static int smu_set_xgmi_pstate(void *handle,
        return ret;
 }
 
-static bool smu_get_baco_capability(void *handle)
+static int smu_get_baco_capability(void *handle)
 {
        struct smu_context *smu = handle;
 

diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
index 3ef76f9543f3ddd32e19714f536262f945432ffb..5dd092703b8dcb96da24dd1a3dc6324c382feaa5 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
@@ -1178,7 +1178,7 @@ struct pptable_funcs {
         * BACO: Bus Active, Chip Off
         * MACO: Memory Active, Chip Off
         */
-       bool (*get_bamaco_support)(struct smu_context *smu);
+       int (*get_bamaco_support)(struct smu_context *smu);
 
        /**
         * @baco_get_state: Get the current BACO state.

diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h
index 0e8fdf3bccc4f974ddbb4ef968ce1bbd18bc558a..c2ab336bb53080376629468ca0ab4a3fef000491 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h
@@ -237,7 +237,7 @@ int smu_v11_0_set_azalia_d3_pme(struct smu_context *smu);
 int smu_v11_0_get_max_sustainable_clocks_by_dc(struct smu_context *smu,
                struct pp_smu_nv_clock_table *max_clocks);
 
-bool smu_v11_0_get_bamaco_support(struct smu_context *smu);
+int smu_v11_0_get_bamaco_support(struct smu_context *smu);
 
 enum smu_baco_state smu_v11_0_baco_get_state(struct smu_context *smu);
 

diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
index bad7e73e9fe039f07c476614882df861da19bbf8..d9700a3f28d2fae4096c48453a7b231e27789599 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
@@ -210,7 +210,7 @@ int smu_v13_0_set_azalia_d3_pme(struct smu_context *smu);
 int smu_v13_0_get_max_sustainable_clocks_by_dc(struct smu_context *smu,
                                               struct pp_smu_nv_clock_table *max_clocks);
 
-bool smu_v13_0_get_bamaco_support(struct smu_context *smu);
+int smu_v13_0_get_bamaco_support(struct smu_context *smu);
 
 int smu_v13_0_baco_enter(struct smu_context *smu);
 int smu_v13_0_baco_exit(struct smu_context *smu);

diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0.h b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0.h
index 31bbbc1ddda2ac11acc3fa0947b732eeac05ab22..6cdfee5052d9a5ac34c0958e2aa03b0e38c689a2 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0.h
@@ -160,7 +160,7 @@ int smu_v14_0_register_irq_handler(struct smu_context *smu);
 int smu_v14_0_baco_set_armd3_sequence(struct smu_context *smu,
                                      enum smu_baco_seq baco_seq);
 
-bool smu_v14_0_get_bamaco_support(struct smu_context *smu);
+int smu_v14_0_get_bamaco_support(struct smu_context *smu);
 
 enum smu_baco_state smu_v14_0_baco_get_state(struct smu_context *smu);
 

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
index f6913820dbb73565e14e1792ec5a8f2bdcb47825..8407ca4fdc172c944ddae1ea43f79dabd2af6ccd 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
@@ -1557,23 +1557,27 @@ int smu_v11_0_baco_set_armd3_sequence(struct smu_context *smu,
        return smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_ArmD3, baco_seq, NULL);
 }
 
-bool smu_v11_0_get_bamaco_support(struct smu_context *smu)
+int smu_v11_0_get_bamaco_support(struct smu_context *smu)
 {
        struct smu_baco_context *smu_baco = &smu->smu_baco;
+       int bamaco_support = 0;
 
        if (amdgpu_sriov_vf(smu->adev) || !smu_baco->platform_support)
-               return false;
+               return 0;
+
+       if (smu_baco->maco_support)
+               bamaco_support |= MACO_SUPPORT;
 
        /* return true if ASIC is in BACO state already */
        if (smu_v11_0_baco_get_state(smu) == SMU_BACO_STATE_ENTER)
-               return true;
+               return bamaco_support |= BACO_SUPPORT;
 
        /* Arcturus does not support this bit mask */
        if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_BACO_BIT) &&
           !smu_cmn_feature_is_enabled(smu, SMU_FEATURE_BACO_BIT))
-               return false;
+               return 0;
 
-       return true;
+       return (bamaco_support |= BACO_SUPPORT);
 }
 
 enum smu_baco_state smu_v11_0_baco_get_state(struct smu_context *smu)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
index 639edcb90deb5e3a50ae02637f356543cc1da0e5..acf41db3ef7225ed70c48d7999c924cd7879b81e 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
@@ -1581,11 +1581,11 @@ out:
        adev->unique_id = ((uint64_t)upper32 << 32) | lower32;
 }
 
-static bool aldebaran_get_bamaco_support(struct smu_context *smu)
+static int aldebaran_get_bamaco_support(struct smu_context *smu)
 {
        /* aldebaran is not support baco */
 
-       return false;
+       return 0;
 }
 
 static int aldebaran_set_df_cstate(struct smu_context *smu,

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
index 0193b81eab147c2fd7fdf1985fb7917668fa43dc..7277cc72d7f5d877b7c44b26479460a1cef00ab4 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
@@ -2268,22 +2268,26 @@ static int smu_v13_0_baco_set_state(struct smu_context *smu,
        return ret;
 }
 
-bool smu_v13_0_get_bamaco_support(struct smu_context *smu)
+int smu_v13_0_get_bamaco_support(struct smu_context *smu)
 {
        struct smu_baco_context *smu_baco = &smu->smu_baco;
+       int bamaco_support = 0;
 
        if (amdgpu_sriov_vf(smu->adev) || !smu_baco->platform_support)
-               return false;
+               return 0;
+
+       if (smu_baco->maco_support)
+               bamaco_support |= MACO_SUPPORT;
 
        /* return true if ASIC is in BACO state already */
        if (smu_v13_0_baco_get_state(smu) == SMU_BACO_STATE_ENTER)
-               return true;
+               return bamaco_support |= BACO_SUPPORT;
 
        if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_BACO_BIT) &&
            !smu_cmn_feature_is_enabled(smu, SMU_FEATURE_BACO_BIT))
-               return false;
+               return 0;
 
-       return true;
+       return (bamaco_support |= BACO_SUPPORT);
 }
 
 int smu_v13_0_baco_enter(struct smu_context *smu)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
index 7c3a85879fd5b5911bf73e9d10234eef5b8fa8d2..624432b3b48348adfb787802bc97370ee20ff2cc 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
@@ -2077,11 +2077,11 @@ static void smu_v13_0_6_get_unique_id(struct smu_context *smu)
        adev->unique_id = pptable->PublicSerialNumber_AID;
 }
 
-static bool smu_v13_0_6_get_bamaco_support(struct smu_context *smu)
+static int smu_v13_0_6_get_bamaco_support(struct smu_context *smu)
 {
        /* smu_13_0_6 does not support baco */
 
-       return false;
+       return 0;
 }
 
 static const char *const throttling_logging_label[] = {

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c
index 5bf6bde9916179aa9726facd7bac665b0b15c130..707b37f535e225979389103f4718aca609f93afc 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0.c
@@ -1590,23 +1590,27 @@ int smu_v14_0_baco_set_armd3_sequence(struct smu_context *smu,
        return 0;
 }
 
-bool smu_v14_0_get_bamaco_support(struct smu_context *smu)
+int smu_v14_0_get_bamaco_support(struct smu_context *smu)
 {
        struct smu_baco_context *smu_baco = &smu->smu_baco;
+       int bamaco_support = 0;
 
        if (amdgpu_sriov_vf(smu->adev) ||
            !smu_baco->platform_support)
-               return false;
+               return 0;
+
+       if (smu_baco->maco_support)
+               bamaco_support |= MACO_SUPPORT;
 
        /* return true if ASIC is in BACO state already */
        if (smu_v14_0_baco_get_state(smu) == SMU_BACO_STATE_ENTER)
-               return true;
+               return (bamaco_support |= BACO_SUPPORT);
 
        if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_BACO_BIT) &&
            !smu_cmn_feature_is_enabled(smu, SMU_FEATURE_BACO_BIT))
-               return false;
+               return 0;
 
-       return true;
+       return (bamaco_support |= BACO_SUPPORT);
 }
 
 enum smu_baco_state smu_v14_0_baco_get_state(struct smu_context *smu)