drm/ast: Split ast_set_def_ext_reg() by chip generation

Duplicate ast_set_def_ext_reg() for individual chip generations
and move call it into per-chip source files. Remove the original
code. AST2100 and AST2500 reuse the function from earlier chips.
AST2600 appears to be incorrect as it uses an older function. Keep
this behavior for now.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com>
Link: https://lore.kernel.org/r/20250706162816.211552-9-tzimmermann@suse.de

diff --git a/drivers/gpu/drm/ast/ast_2000.c b/drivers/gpu/drm/ast/ast_2000.c
index 93f13ecc74dc4444515e77098fd83249b2d8ce6a..41c2aa1e425aa1f4e3848e31265060ef8d917bfc 100644 (file)
--- a/drivers/gpu/drm/ast/ast_2000.c
+++ b/drivers/gpu/drm/ast/ast_2000.c
@@ -35,6 +35,36 @@
  * POST
  */
 
+void ast_2000_set_def_ext_reg(struct ast_device *ast)
+{
+       static const u8 extreginfo[] = { 0x0f, 0x04, 0x1c, 0xff };
+       u8 i, index, reg;
+       const u8 *ext_reg_info;
+
+       /* reset scratch */
+       for (i = 0x81; i <= 0x9f; i++)
+               ast_set_index_reg(ast, AST_IO_VGACRI, i, 0x00);
+
+       ext_reg_info = extreginfo;
+       index = 0xa0;
+       while (*ext_reg_info != 0xff) {
+               ast_set_index_reg_mask(ast, AST_IO_VGACRI, index, 0x00, *ext_reg_info);
+               index++;
+               ext_reg_info++;
+       }
+
+       /* disable standard IO/MEM decode if secondary */
+       /* ast_set_index_reg-mask(ast, AST_IO_VGACRI, 0xa1, 0xff, 0x3); */
+
+       /* Set Ext. Default */
+       ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x8c, 0x00, 0x01);
+       ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb7, 0x00, 0x00);
+
+       /* Enable RAMDAC for A1 */
+       reg = 0x04;
+       ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0xff, reg);
+}
+
 static const struct ast_dramstruct ast2000_dram_table_data[] = {
        { 0x0108, 0x00000000 },
        { 0x0120, 0x00004a21 },
@@ -104,6 +134,8 @@ static void ast_post_chip_2000(struct ast_device *ast)
 
 int ast_2000_post(struct ast_device *ast)
 {
+       ast_2000_set_def_ext_reg(ast);
+
        if (ast->config_mode == ast_use_p2a) {
                ast_post_chip_2000(ast);
        } else {

diff --git a/drivers/gpu/drm/ast/ast_2100.c b/drivers/gpu/drm/ast/ast_2100.c
index 1cabac647584081f6ca5246de74f174f7f7e32e9..477ee15eff5de4adfd9a698f48d9468be6038e62 100644 (file)
--- a/drivers/gpu/drm/ast/ast_2100.c
+++ b/drivers/gpu/drm/ast/ast_2100.c
@@ -333,6 +333,8 @@ static void ast_post_chip_2100(struct ast_device *ast)
 
 int ast_2100_post(struct ast_device *ast)
 {
+       ast_2000_set_def_ext_reg(ast);
+
        if (ast->config_mode == ast_use_p2a) {
                ast_post_chip_2100(ast);
        } else {

diff --git a/drivers/gpu/drm/ast/ast_2300.c b/drivers/gpu/drm/ast/ast_2300.c
index 7a2c3fde09d2847060d2f236b6e6bff324742413..dc2a322446893cd6c0e791f144aee51cf6332810 100644 (file)
--- a/drivers/gpu/drm/ast/ast_2300.c
+++ b/drivers/gpu/drm/ast/ast_2300.c
@@ -35,6 +35,37 @@
  *  POST
  */
 
+void ast_2300_set_def_ext_reg(struct ast_device *ast)
+{
+       static const u8 extreginfo[] = { 0x0f, 0x04, 0x1f, 0xff };
+       u8 i, index, reg;
+       const u8 *ext_reg_info;
+
+       /* reset scratch */
+       for (i = 0x81; i <= 0x9f; i++)
+               ast_set_index_reg(ast, AST_IO_VGACRI, i, 0x00);
+
+       ext_reg_info = extreginfo;
+       index = 0xa0;
+       while (*ext_reg_info != 0xff) {
+               ast_set_index_reg_mask(ast, AST_IO_VGACRI, index, 0x00, *ext_reg_info);
+               index++;
+               ext_reg_info++;
+       }
+
+       /* disable standard IO/MEM decode if secondary */
+       /* ast_set_index_reg-mask(ast, AST_IO_VGACRI, 0xa1, 0xff, 0x3); */
+
+       /* Set Ext. Default */
+       ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x8c, 0x00, 0x01);
+       ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb7, 0x00, 0x00);
+
+       /* Enable RAMDAC for A1 */
+       reg = 0x04;
+       reg |= 0x20;
+       ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0xff, reg);
+}
+
 /* AST 2300 DRAM settings */
 #define AST_DDR3 0
 #define AST_DDR2 1
@@ -1281,6 +1312,8 @@ static void ast_post_chip_2300(struct ast_device *ast)
 
 int ast_2300_post(struct ast_device *ast)
 {
+       ast_2300_set_def_ext_reg(ast);
+
        if (ast->config_mode == ast_use_p2a) {
                ast_post_chip_2300(ast);
                ast_init_3rdtx(ast);

diff --git a/drivers/gpu/drm/ast/ast_2500.c b/drivers/gpu/drm/ast/ast_2500.c
index e5b3e0c6322205c5d6eb925da04872798a043915..1e541498ea6743c193471106ec937ad3b450a7c4 100644 (file)
--- a/drivers/gpu/drm/ast/ast_2500.c
+++ b/drivers/gpu/drm/ast/ast_2500.c
@@ -554,6 +554,8 @@ static void ast_post_chip_2500(struct ast_device *ast)
 
 int ast_2500_post(struct ast_device *ast)
 {
+       ast_2300_set_def_ext_reg(ast);
+
        if (ast->config_mode == ast_use_p2a) {
                ast_post_chip_2500(ast);
        } else {

diff --git a/drivers/gpu/drm/ast/ast_2600.c b/drivers/gpu/drm/ast/ast_2600.c
index f58a2ceddb3a2600d68ca190518b6d2cdd1ff8b2..08614090068d4b22f2c7ba410d40ea999b08dae3 100644 (file)
--- a/drivers/gpu/drm/ast/ast_2600.c
+++ b/drivers/gpu/drm/ast/ast_2600.c
@@ -27,13 +27,46 @@
  */
 
 #include "ast_drv.h"
+#include "ast_post.h"
 
 /*
  * POST
  */
 
+void ast_2600_set_def_ext_reg(struct ast_device *ast)
+{
+       static const u8 extreginfo[] = { 0x0f, 0x04, 0x1c, 0xff };
+       u8 i, index, reg;
+       const u8 *ext_reg_info;
+
+       /* reset scratch */
+       for (i = 0x81; i <= 0x9f; i++)
+               ast_set_index_reg(ast, AST_IO_VGACRI, i, 0x00);
+
+       ext_reg_info = extreginfo;
+       index = 0xa0;
+       while (*ext_reg_info != 0xff) {
+               ast_set_index_reg_mask(ast, AST_IO_VGACRI, index, 0x00, *ext_reg_info);
+               index++;
+               ext_reg_info++;
+       }
+
+       /* disable standard IO/MEM decode if secondary */
+       /* ast_set_index_reg-mask(ast, AST_IO_VGACRI, 0xa1, 0xff, 0x3); */
+
+       /* Set Ext. Default */
+       ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x8c, 0x00, 0x01);
+       ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb7, 0x00, 0x00);
+
+       /* Enable RAMDAC for A1 */
+       reg = 0x04;
+       ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0xff, reg);
+}
+
 int ast_2600_post(struct ast_device *ast)
 {
+       ast_2600_set_def_ext_reg(ast);
+
        if (ast->tx_chip == AST_TX_ASTDP)
                return ast_dp_launch(ast);
 

diff --git a/drivers/gpu/drm/ast/ast_post.c b/drivers/gpu/drm/ast/ast_post.c
index 8e575e713f193064e722a027b6acecc429d2a2c9..b72914dbed38d3edbfc48ae511552255cda65db6 100644 (file)
--- a/drivers/gpu/drm/ast/ast_post.c
+++ b/drivers/gpu/drm/ast/ast_post.c
@@ -34,44 +34,6 @@
 #include "ast_drv.h"
 #include "ast_post.h"
 
-static const u8 extreginfo[] = { 0x0f, 0x04, 0x1c, 0xff };
-static const u8 extreginfo_ast2300[] = { 0x0f, 0x04, 0x1f, 0xff };
-
-static void ast_set_def_ext_reg(struct ast_device *ast)
-{
-       u8 i, index, reg;
-       const u8 *ext_reg_info;
-
-       /* reset scratch */
-       for (i = 0x81; i <= 0x9f; i++)
-               ast_set_index_reg(ast, AST_IO_VGACRI, i, 0x00);
-
-       if (IS_AST_GEN4(ast) || IS_AST_GEN5(ast) || IS_AST_GEN6(ast))
-               ext_reg_info = extreginfo_ast2300;
-       else
-               ext_reg_info = extreginfo;
-
-       index = 0xa0;
-       while (*ext_reg_info != 0xff) {
-               ast_set_index_reg_mask(ast, AST_IO_VGACRI, index, 0x00, *ext_reg_info);
-               index++;
-               ext_reg_info++;
-       }
-
-       /* disable standard IO/MEM decode if secondary */
-       /* ast_set_index_reg-mask(ast, AST_IO_VGACRI, 0xa1, 0xff, 0x3); */
-
-       /* Set Ext. Default */
-       ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x8c, 0x00, 0x01);
-       ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb7, 0x00, 0x00);
-
-       /* Enable RAMDAC for A1 */
-       reg = 0x04;
-       if (IS_AST_GEN4(ast) || IS_AST_GEN5(ast) || IS_AST_GEN6(ast))
-               reg |= 0x20;
-       ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0xff, reg);
-}
-
 u32 __ast_mindwm(void __iomem *regs, u32 r)
 {
        u32 data;
@@ -114,8 +76,6 @@ int ast_post_gpu(struct ast_device *ast)
 {
        int ret;
 
-       ast_set_def_ext_reg(ast);
-
        if (AST_GEN(ast) >= 7) {
                ret = ast_2600_post(ast);
                if (ret)

diff --git a/drivers/gpu/drm/ast/ast_post.h b/drivers/gpu/drm/ast/ast_post.h
index 44136856952f01d7e38d899631a8dab404f8c14d..9f3108ddeae8884596f7fd172e0677dacbdff63a 100644 (file)
--- a/drivers/gpu/drm/ast/ast_post.h
+++ b/drivers/gpu/drm/ast/ast_post.h
@@ -41,4 +41,13 @@ void __ast_moutdwm(void __iomem *regs, u32 r, u32 v);
 bool mmc_test(struct ast_device *ast, u32 datagen, u8 test_ctl);
 bool mmc_test_burst(struct ast_device *ast, u32 datagen);
 
+/* ast_2000.c */
+void ast_2000_set_def_ext_reg(struct ast_device *ast);
+
+/* ast_2300.c */
+void ast_2300_set_def_ext_reg(struct ast_device *ast);
+
+/* ast_2600.c */
+void ast_2600_set_def_ext_reg(struct ast_device *ast);
+
 #endif