encoder->get_buf_trans = icl_get_mg_buf_trans;
        } else if (IS_GEMINILAKE(i915) || IS_BROXTON(i915)) {
                encoder->get_buf_trans = bxt_get_buf_trans;
-       } else if (IS_CML_ULX(i915) || IS_CFL_ULX(i915) || IS_KBL_ULX(i915)) {
+       } else if (IS_CML_ULX(i915) || IS_CFL_ULX(i915) || IS_KABYLAKE_ULX(i915)) {
                encoder->get_buf_trans = kbl_y_get_buf_trans;
-       } else if (IS_CML_ULT(i915) || IS_CFL_ULT(i915) || IS_KBL_ULT(i915)) {
+       } else if (IS_CML_ULT(i915) || IS_CFL_ULT(i915) || IS_KABYLAKE_ULT(i915)) {
                encoder->get_buf_trans = kbl_u_get_buf_trans;
        } else if (IS_COMETLAKE(i915) || IS_COFFEELAKE(i915) || IS_KABYLAKE(i915)) {
                encoder->get_buf_trans = kbl_get_buf_trans;
 
                        vf_flush_wa = true;
 
                /* WaForGAMHang:kbl */
-               if (IS_KBL_GRAPHICS_STEP(rq->i915, 0, STEP_C0))
+               if (IS_KABYLAKE(rq->i915) && IS_GRAPHICS_STEP(rq->i915, 0, STEP_C0))
                        dc_flush_wa = true;
        }
 
 
        gen9_ctx_workarounds_init(engine, wal);
 
        /* WaToEnableHwFixForPushConstHWBug:kbl */
-       if (IS_KBL_GRAPHICS_STEP(i915, STEP_C0, STEP_FOREVER))
+       if (IS_KABYLAKE(i915) && IS_GRAPHICS_STEP(i915, STEP_C0, STEP_FOREVER))
                wa_masked_en(wal, COMMON_SLICE_CHICKEN2,
                             GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION);
 
        gen9_gt_workarounds_init(gt, wal);
 
        /* WaDisableDynamicCreditSharing:kbl */
-       if (IS_KBL_GRAPHICS_STEP(gt->i915, 0, STEP_C0))
+       if (IS_KABYLAKE(gt->i915) && IS_GRAPHICS_STEP(gt->i915, 0, STEP_C0))
                wa_write_or(wal,
                            GAMT_CHKN_BIT_REG,
                            GAMT_CHKN_DISABLE_DYNAMIC_CREDIT_SHARING);
        struct drm_i915_private *i915 = engine->i915;
 
        /* WaKBLVECSSemaphoreWaitPoll:kbl */
-       if (IS_KBL_GRAPHICS_STEP(i915, STEP_A0, STEP_F0)) {
+       if (IS_KABYLAKE(i915) && IS_GRAPHICS_STEP(i915, STEP_A0, STEP_F0)) {
                wa_write(wal,
                         RING_SEMA_WAIT_POLL(engine->mmio_base),
                         1);
 
        IS_SUBPLATFORM(i915, INTEL_SKYLAKE, INTEL_SUBPLATFORM_ULT)
 #define IS_SKYLAKE_ULX(i915) \
        IS_SUBPLATFORM(i915, INTEL_SKYLAKE, INTEL_SUBPLATFORM_ULX)
-#define IS_KBL_ULT(i915) \
+#define IS_KABYLAKE_ULT(i915) \
        IS_SUBPLATFORM(i915, INTEL_KABYLAKE, INTEL_SUBPLATFORM_ULT)
-#define IS_KBL_ULX(i915) \
+#define IS_KABYLAKE_ULX(i915) \
        IS_SUBPLATFORM(i915, INTEL_KABYLAKE, INTEL_SUBPLATFORM_ULX)
 #define IS_SKYLAKE_GT2(i915)   (IS_SKYLAKE(i915) && \
                                 INTEL_INFO(i915)->gt == 2)
                                 INTEL_INFO(i915)->gt == 3)
 #define IS_SKYLAKE_GT4(i915)   (IS_SKYLAKE(i915) && \
                                 INTEL_INFO(i915)->gt == 4)
-#define IS_KBL_GT2(i915)       (IS_KABYLAKE(i915) && \
+#define IS_KABYLAKE_GT2(i915)  (IS_KABYLAKE(i915) && \
                                 INTEL_INFO(i915)->gt == 2)
-#define IS_KBL_GT3(i915)       (IS_KABYLAKE(i915) && \
+#define IS_KABYLAKE_GT3(i915)  (IS_KABYLAKE(i915) && \
                                 INTEL_INFO(i915)->gt == 3)
 #define IS_CFL_ULT(i915) \
        IS_SUBPLATFORM(i915, INTEL_COFFEELAKE, INTEL_SUBPLATFORM_ULT)
        IS_SUBPLATFORM(i915, INTEL_TIGERLAKE, INTEL_SUBPLATFORM_UY)
 
 
-#define IS_KBL_GRAPHICS_STEP(i915, since, until) \
-       (IS_KABYLAKE(i915) && IS_GRAPHICS_STEP(i915, since, until))
-#define IS_KBL_DISPLAY_STEP(i915, since, until) \
-       (IS_KABYLAKE(i915) && IS_DISPLAY_STEP(i915, since, until))
 
 #define IS_JSL_EHL_GRAPHICS_STEP(p, since, until) \
        (IS_JSL_EHL(p) && IS_GRAPHICS_STEP(p, since, until))
 
        intel_uncore_rmw(&i915->uncore, FBC_LLC_READ_CTRL, 0, FBC_LLC_FULLY_OPEN);
 
        /* WaDisableSDEUnitClockGating:kbl */
-       if (IS_KBL_GRAPHICS_STEP(i915, 0, STEP_C0))
+       if (IS_KABYLAKE(i915) && IS_GRAPHICS_STEP(i915, 0, STEP_C0))
                intel_uncore_rmw(&i915->uncore, GEN8_UCGCTL6,
                                 0, GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
 
        /* WaDisableGamClockGating:kbl */
-       if (IS_KBL_GRAPHICS_STEP(i915, 0, STEP_C0))
+       if (IS_KABYLAKE(i915) && IS_GRAPHICS_STEP(i915, 0, STEP_C0))
                intel_uncore_rmw(&i915->uncore, GEN6_UCGCTL1,
                                 0, GEN6_GAMUNIT_CLOCK_GATE_DISABLE);