drm/amdgpu: add structures for rlcg indirect reg access

Add structures that are used to cache registers offsets
for rlcg indirect reg access ctrl and flag availability
of such interface

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Zhou, Peng Ju <PengJu.Zhou@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h
index 00afd0dcae86cd7a24db1ec50c6087a5273afb12..286b2347d063f5418dbfc4ba0f4adfe6d35368ff 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h
@@ -132,6 +132,16 @@ struct amdgpu_rlc_funcs {
        bool (*is_rlcg_access_range)(struct amdgpu_device *adev, uint32_t reg);
 };
 
+struct amdgpu_rlcg_reg_access_ctrl {
+       uint32_t scratch_reg0;
+       uint32_t scratch_reg1;
+       uint32_t scratch_reg2;
+       uint32_t scratch_reg3;
+       uint32_t grbm_cntl;
+       uint32_t grbm_idx;
+       uint32_t spare_int;
+};
+
 struct amdgpu_rlc {
        /* for power gating */
        struct amdgpu_bo        *save_restore_obj;
@@ -191,6 +201,10 @@ struct amdgpu_rlc {
        struct amdgpu_bo        *rlc_toc_bo;
        uint64_t                rlc_toc_gpu_addr;
        void                    *rlc_toc_buf;
+
+       bool rlcg_reg_access_supported;
+       /* registers for rlcg indirect reg access */
+       struct amdgpu_rlcg_reg_access_ctrl reg_access_ctrl;
 };
 
 void amdgpu_gfx_rlc_enter_safe_mode(struct amdgpu_device *adev);