drm/amdgpu: Modify mca block to fit for the unified ras block data and ops

1.Modify mca block to fit for the unified ras block data and ops.
2.Define special .ras_block_match function for mca block to identify itself.
3.Change amdgpu_mca_ras_funcs to amdgpu_mca_ras_block(amdgpu_mca_ras had been used), and the corresponding variable name remove _funcs suffix.
4.Remove the const flag of cma ras variable so that cma ras block can be able to be inserted into amdgpu device ras block link list.
5.Invoke amdgpu_ras_register_ras_block function to register cma ras block into amdgpu device ras block link list.
6.Remove the redundant code about cma in amdgpu_ras.c after using the unified ras block.

Signed-off-by: yipechai <YiPeng.Chai@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: John Clements <john.clements@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
index de0ef21e15011f2a9544dca269e1d2b5d643801d..a0a9abd23a7b1854b98a7bf5a74478f87c8d4ee9 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
@@ -469,23 +469,20 @@ int amdgpu_gmc_ras_late_init(struct amdgpu_device *adev)
                        return r;
        }
 
-       if (adev->mca.mp0.ras_funcs &&
-           adev->mca.mp0.ras_funcs->ras_late_init) {
-               r = adev->mca.mp0.ras_funcs->ras_late_init(adev);
+       if (adev->mca.mp0.ras && adev->mca.mp0.ras->ras_block.ras_late_init) {
+               r = adev->mca.mp0.ras->ras_block.ras_late_init(adev, NULL);
                if (r)
                        return r;
        }
 
-       if (adev->mca.mp1.ras_funcs &&
-           adev->mca.mp1.ras_funcs->ras_late_init) {
-               r = adev->mca.mp1.ras_funcs->ras_late_init(adev);
+       if (adev->mca.mp1.ras && adev->mca.mp1.ras->ras_block.ras_late_init) {
+               r = adev->mca.mp1.ras->ras_block.ras_late_init(adev, NULL);
                if (r)
                        return r;
        }
 
-       if (adev->mca.mpio.ras_funcs &&
-           adev->mca.mpio.ras_funcs->ras_late_init) {
-               r = adev->mca.mpio.ras_funcs->ras_late_init(adev);
+       if (adev->mca.mpio.ras && adev->mca.mpio.ras->ras_block.ras_late_init) {
+               r = adev->mca.mpio.ras->ras_block.ras_late_init(adev, NULL);
                if (r)
                        return r;
        }

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c
index ce538f4819f925c1b9c5afffc591c21c6c14e0bd..52a60c2316a2ef363629e4e41ac4026fb0405b83 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c
@@ -74,20 +74,23 @@ void amdgpu_mca_query_ras_error_count(struct amdgpu_device *adev,
 int amdgpu_mca_ras_late_init(struct amdgpu_device *adev,
                             struct amdgpu_mca_ras *mca_dev)
 {
+       char sysfs_name[32] = {0};
        int r;
        struct ras_ih_if ih_info = {
                .cb = NULL,
        };
-       struct ras_fs_if fs_info = {
-               .sysfs_name = mca_dev->ras_funcs->sysfs_name,
+       struct ras_fs_if fs_info= {
+               .sysfs_name = sysfs_name,
        };
 
+       snprintf(sysfs_name, sizeof(sysfs_name), "%s_err_count", mca_dev->ras->ras_block.name);
+
        if (!mca_dev->ras_if) {
                mca_dev->ras_if = kmalloc(sizeof(struct ras_common_if), GFP_KERNEL);
                if (!mca_dev->ras_if)
                        return -ENOMEM;
-               mca_dev->ras_if->block = mca_dev->ras_funcs->ras_block;
-               mca_dev->ras_if->sub_block_index = mca_dev->ras_funcs->ras_sub_block;
+               mca_dev->ras_if->block = mca_dev->ras->ras_block.block;
+               mca_dev->ras_if->sub_block_index = mca_dev->ras->ras_block.sub_block_index;
                mca_dev->ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;
        }
        ih_info.head = fs_info.head = *mca_dev->ras_if;

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.h
index c74bc7177066ec534015703dd13d3c38b3303551..be030c4031d294d3ec906e4b0c109ee006cb576c 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.h
@@ -21,21 +21,13 @@
 #ifndef __AMDGPU_MCA_H__
 #define __AMDGPU_MCA_H__
 
-struct amdgpu_mca_ras_funcs {
-       int (*ras_late_init)(struct amdgpu_device *adev);
-       void (*ras_fini)(struct amdgpu_device *adev);
-       void (*query_ras_error_count)(struct amdgpu_device *adev,
-                                     void *ras_error_status);
-       void (*query_ras_error_address)(struct amdgpu_device *adev,
-                                       void *ras_error_status);
-       uint32_t ras_block;
-       uint32_t ras_sub_block;
-       const char* sysfs_name;
+struct amdgpu_mca_ras_block {
+       struct amdgpu_ras_block_object ras_block;
 };
 
 struct amdgpu_mca_ras {
        struct ras_common_if *ras_if;
-       const struct amdgpu_mca_ras_funcs *ras_funcs;
+       struct amdgpu_mca_ras_block *ras;
 };
 
 struct amdgpu_mca_funcs {

diff --git a/drivers/gpu/drm/amd/amdgpu/mca_v3_0.c b/drivers/gpu/drm/amd/amdgpu/mca_v3_0.c
index 8f7107d392afba3fa6e164ca796e1c068bcf8ed3..f51092041edc6223fad71bfc3491640c5bbbaed0 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/mca_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mca_v3_0.c
@@ -37,7 +37,7 @@ static void mca_v3_0_mp0_query_ras_error_count(struct amdgpu_device *adev,
                                         ras_error_status);
 }
 
-static int mca_v3_0_mp0_ras_late_init(struct amdgpu_device *adev)
+static int mca_v3_0_mp0_ras_late_init(struct amdgpu_device *adev, void *ras_info)
 {
        return amdgpu_mca_ras_late_init(adev, &adev->mca.mp0);
 }
@@ -47,14 +47,34 @@ static void mca_v3_0_mp0_ras_fini(struct amdgpu_device *adev)
        amdgpu_mca_ras_fini(adev, &adev->mca.mp0);
 }
 
-const struct amdgpu_mca_ras_funcs mca_v3_0_mp0_ras_funcs = {
-       .ras_late_init = mca_v3_0_mp0_ras_late_init,
-       .ras_fini = mca_v3_0_mp0_ras_fini,
+static int mca_v3_0_ras_block_match(struct amdgpu_ras_block_object* block_obj, enum amdgpu_ras_block block, uint32_t sub_block_index)
+{
+       if(!block_obj)
+               return -EINVAL;
+
+       if( (block_obj->block == block) &&
+               (block_obj->sub_block_index == sub_block_index)) {
+               return 0;
+       }
+
+       return -EINVAL;
+}
+
+const struct amdgpu_ras_block_hw_ops mca_v3_0_mp0_hw_ops = {
        .query_ras_error_count = mca_v3_0_mp0_query_ras_error_count,
        .query_ras_error_address = NULL,
-       .ras_block = AMDGPU_RAS_BLOCK__MCA,
-       .ras_sub_block = AMDGPU_RAS_MCA_BLOCK__MP0,
-       .sysfs_name = "mp0_err_count",
+};
+
+struct amdgpu_mca_ras_block mca_v3_0_mp0_ras = {
+       .ras_block = {
+               .block = AMDGPU_RAS_BLOCK__MCA,
+               .sub_block_index = AMDGPU_RAS_MCA_BLOCK__MP0,
+               .name = "mp0",
+               .hw_ops = &mca_v3_0_mp0_hw_ops,
+               .ras_block_match = mca_v3_0_ras_block_match,
+               .ras_late_init = mca_v3_0_mp0_ras_late_init,
+               .ras_fini = mca_v3_0_mp0_ras_fini,
+       },
 };
 
 static void mca_v3_0_mp1_query_ras_error_count(struct amdgpu_device *adev,
@@ -65,7 +85,7 @@ static void mca_v3_0_mp1_query_ras_error_count(struct amdgpu_device *adev,
                                         ras_error_status);
 }
 
-static int mca_v3_0_mp1_ras_late_init(struct amdgpu_device *adev)
+static int mca_v3_0_mp1_ras_late_init(struct amdgpu_device *adev, void *ras_info)
 {
        return amdgpu_mca_ras_late_init(adev, &adev->mca.mp1);
 }
@@ -75,14 +95,21 @@ static void mca_v3_0_mp1_ras_fini(struct amdgpu_device *adev)
        amdgpu_mca_ras_fini(adev, &adev->mca.mp1);
 }
 
-const struct amdgpu_mca_ras_funcs mca_v3_0_mp1_ras_funcs = {
-       .ras_late_init = mca_v3_0_mp1_ras_late_init,
-       .ras_fini = mca_v3_0_mp1_ras_fini,
+const struct amdgpu_ras_block_hw_ops mca_v3_0_mp1_hw_ops = {
        .query_ras_error_count = mca_v3_0_mp1_query_ras_error_count,
        .query_ras_error_address = NULL,
-       .ras_block = AMDGPU_RAS_BLOCK__MCA,
-       .ras_sub_block = AMDGPU_RAS_MCA_BLOCK__MP1,
-       .sysfs_name = "mp1_err_count",
+};
+
+struct amdgpu_mca_ras_block mca_v3_0_mp1_ras = {
+       .ras_block = {
+               .block = AMDGPU_RAS_BLOCK__MCA,
+               .sub_block_index = AMDGPU_RAS_MCA_BLOCK__MP1,
+               .name = "mp1",
+               .hw_ops = &mca_v3_0_mp1_hw_ops,
+               .ras_block_match = mca_v3_0_ras_block_match,
+               .ras_late_init = mca_v3_0_mp1_ras_late_init,
+               .ras_fini = mca_v3_0_mp1_ras_fini,
+       },
 };
 
 static void mca_v3_0_mpio_query_ras_error_count(struct amdgpu_device *adev,
@@ -93,7 +120,7 @@ static void mca_v3_0_mpio_query_ras_error_count(struct amdgpu_device *adev,
                                         ras_error_status);
 }
 
-static int mca_v3_0_mpio_ras_late_init(struct amdgpu_device *adev)
+static int mca_v3_0_mpio_ras_late_init(struct amdgpu_device *adev, void *ras_info)
 {
        return amdgpu_mca_ras_late_init(adev, &adev->mca.mpio);
 }
@@ -103,14 +130,21 @@ static void mca_v3_0_mpio_ras_fini(struct amdgpu_device *adev)
        amdgpu_mca_ras_fini(adev, &adev->mca.mpio);
 }
 
-const struct amdgpu_mca_ras_funcs mca_v3_0_mpio_ras_funcs = {
-       .ras_late_init = mca_v3_0_mpio_ras_late_init,
-       .ras_fini = mca_v3_0_mpio_ras_fini,
+const struct amdgpu_ras_block_hw_ops mca_v3_0_mpio_hw_ops = {
        .query_ras_error_count = mca_v3_0_mpio_query_ras_error_count,
        .query_ras_error_address = NULL,
-       .ras_block = AMDGPU_RAS_BLOCK__MCA,
-       .ras_sub_block = AMDGPU_RAS_MCA_BLOCK__MPIO,
-       .sysfs_name = "mpio_err_count",
+};
+
+struct amdgpu_mca_ras_block mca_v3_0_mpio_ras = {
+       .ras_block = {
+               .block = AMDGPU_RAS_BLOCK__MCA,
+               .sub_block_index = AMDGPU_RAS_MCA_BLOCK__MPIO,
+               .name = "mpio",
+               .hw_ops = &mca_v3_0_mpio_hw_ops,
+               .ras_block_match = mca_v3_0_ras_block_match,
+               .ras_late_init = mca_v3_0_mpio_ras_late_init,
+               .ras_fini = mca_v3_0_mpio_ras_fini,
+       },
 };
 
 
@@ -118,9 +152,12 @@ static void mca_v3_0_init(struct amdgpu_device *adev)
 {
        struct amdgpu_mca *mca = &adev->mca;
 
-       mca->mp0.ras_funcs = &mca_v3_0_mp0_ras_funcs;
-       mca->mp1.ras_funcs = &mca_v3_0_mp1_ras_funcs;
-       mca->mpio.ras_funcs = &mca_v3_0_mpio_ras_funcs;
+       mca->mp0.ras = &mca_v3_0_mp0_ras;
+       mca->mp1.ras = &mca_v3_0_mp1_ras;
+       mca->mpio.ras = &mca_v3_0_mpio_ras;
+       amdgpu_ras_register_ras_block(adev, &mca->mp0.ras->ras_block);
+       amdgpu_ras_register_ras_block(adev, &mca->mp1.ras->ras_block);
+       amdgpu_ras_register_ras_block(adev, &mca->mpio.ras->ras_block);
 }
 
 const struct amdgpu_mca_funcs mca_v3_0_funcs = {