#define UB953_REG_GPIO_INPUT_CTRL_OUT_EN(n)    BIT(4 + (n))
 #define UB953_REG_GPIO_INPUT_CTRL_INPUT_EN(n)  BIT(0 + (n))
 
+#define UB953_REG_BC_CTRL                      0x49
+#define UB953_REG_BC_CTRL_CRC_ERR_CLR          BIT(3)
+
 #define UB953_REG_REV_MASK_ID                  0x50
 #define UB953_REG_GENERAL_STATUS               0x52
 
        ub953_read(priv, UB953_REG_CRC_ERR_CNT2, &v2);
        dev_info(dev, "CRC error count %u\n", v1 | (v2 << 8));
 
+       /* Clear CRC error counter */
+       if (v1 || v2)
+               regmap_update_bits(priv->regmap, UB953_REG_BC_CTRL,
+                                  UB953_REG_BC_CTRL_CRC_ERR_CLR,
+                                  UB953_REG_BC_CTRL_CRC_ERR_CLR);
+
        ub953_read(priv, UB953_REG_CSI_ERR_CNT, &v);
        dev_info(dev, "CSI error count %u\n", v);