drm/i915: pass dev_priv explicitly to TRANS_DDI_FUNC_CTL

Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the TRANS_DDI_FUNC_CTL register macro.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/4ccf75561aa0fb209fd71c85e9089b0350570fd6.1717514638.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index 9beb94494b2b9582e7fd32ffe9c0fad325721f9b..acc80d4393520dd91cf7d7c3f4fecbb64a65aade 100644 (file)
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -796,7 +796,8 @@ gen11_dsi_configure_transcoder(struct intel_encoder *encoder,
                dsi_trans = dsi_port_to_transcoder(port);
 
                /* select data lane width */
-               tmp = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(dsi_trans));
+               tmp = intel_de_read(dev_priv,
+                                   TRANS_DDI_FUNC_CTL(dev_priv, dsi_trans));
                tmp &= ~DDI_PORT_WIDTH_MASK;
                tmp |= DDI_PORT_WIDTH(intel_dsi->lane_count);
 
@@ -822,7 +823,8 @@ gen11_dsi_configure_transcoder(struct intel_encoder *encoder,
 
                /* enable DDI buffer */
                tmp |= TRANS_DDI_FUNC_ENABLE;
-               intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(dsi_trans), tmp);
+               intel_de_write(dev_priv,
+                              TRANS_DDI_FUNC_CTL(dev_priv, dsi_trans), tmp);
        }
 
        /* wait for link ready */
@@ -1333,7 +1335,8 @@ static void gen11_dsi_deconfigure_trancoder(struct intel_encoder *encoder)
        /* disable ddi function */
        for_each_dsi_port(port, intel_dsi->ports) {
                dsi_trans = dsi_port_to_transcoder(port);
-               intel_de_rmw(dev_priv, TRANS_DDI_FUNC_CTL(dsi_trans),
+               intel_de_rmw(dev_priv,
+                            TRANS_DDI_FUNC_CTL(dev_priv, dsi_trans),
                             TRANS_DDI_FUNC_ENABLE, 0);
        }
 
@@ -1697,7 +1700,8 @@ static bool gen11_dsi_get_hw_state(struct intel_encoder *encoder,
 
        for_each_dsi_port(port, intel_dsi->ports) {
                dsi_trans = dsi_port_to_transcoder(port);
-               tmp = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(dsi_trans));
+               tmp = intel_de_read(dev_priv,
+                                   TRANS_DDI_FUNC_CTL(dev_priv, dsi_trans));
                switch (tmp & TRANS_DDI_EDP_INPUT_MASK) {
                case TRANS_DDI_EDP_INPUT_A_ON:
                        *pipe = PIPE_A;

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index c76bbd13bb272b2497dbbfbf23ae25183f9e6b72..4a55ef88c41448c92dd965ffa3d69b95f04469ad 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -606,7 +606,7 @@ void intel_ddi_enable_transcoder_func(struct intel_encoder *encoder,
                               TRANS_DDI_FUNC_CTL2(cpu_transcoder), ctl2);
        }
 
-       intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder),
+       intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(dev_priv, cpu_transcoder),
                       intel_ddi_transcoder_func_reg_val_get(encoder,
                                                             crtc_state));
 }
@@ -626,7 +626,8 @@ intel_ddi_config_transcoder_func(struct intel_encoder *encoder,
 
        ctl = intel_ddi_transcoder_func_reg_val_get(encoder, crtc_state);
        ctl &= ~TRANS_DDI_FUNC_ENABLE;
-       intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), ctl);
+       intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(dev_priv, cpu_transcoder),
+                      ctl);
 }
 
 void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state)
@@ -641,7 +642,8 @@ void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state
                intel_de_write(dev_priv,
                               TRANS_DDI_FUNC_CTL2(cpu_transcoder), 0);
 
-       ctl = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
+       ctl = intel_de_read(dev_priv,
+                           TRANS_DDI_FUNC_CTL(dev_priv, cpu_transcoder));
 
        drm_WARN_ON(crtc->base.dev, ctl & TRANS_DDI_HDCP_SIGNALLING);
 
@@ -660,7 +662,8 @@ void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state
                ctl &= ~(TRANS_DDI_PORT_MASK | TRANS_DDI_MODE_SELECT_MASK);
        }
 
-       intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), ctl);
+       intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(dev_priv, cpu_transcoder),
+                      ctl);
 
        if (intel_has_quirk(display, QUIRK_INCREASE_DDI_DISABLED_TIME) &&
            intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
@@ -684,7 +687,7 @@ int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder,
        if (drm_WARN_ON(dev, !wakeref))
                return -ENXIO;
 
-       intel_de_rmw(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder),
+       intel_de_rmw(dev_priv, TRANS_DDI_FUNC_CTL(dev_priv, cpu_transcoder),
                     hdcp_mask, enable ? hdcp_mask : 0);
        intel_display_power_put(dev_priv, intel_encoder->power_domain, wakeref);
        return ret;
@@ -718,7 +721,8 @@ bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector)
        else
                cpu_transcoder = (enum transcoder) pipe;
 
-       tmp = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
+       tmp = intel_de_read(dev_priv,
+                           TRANS_DDI_FUNC_CTL(dev_priv, cpu_transcoder));
 
        switch (tmp & TRANS_DDI_MODE_SELECT_MASK) {
        case TRANS_DDI_MODE_SELECT_HDMI:
@@ -782,7 +786,7 @@ static void intel_ddi_get_encoder_pipes(struct intel_encoder *encoder,
 
        if (HAS_TRANSCODER(dev_priv, TRANSCODER_EDP) && port == PORT_A) {
                tmp = intel_de_read(dev_priv,
-                                   TRANS_DDI_FUNC_CTL(TRANSCODER_EDP));
+                                   TRANS_DDI_FUNC_CTL(dev_priv, TRANSCODER_EDP));
 
                switch (tmp & TRANS_DDI_EDP_INPUT_MASK) {
                default:
@@ -823,7 +827,7 @@ static void intel_ddi_get_encoder_pipes(struct intel_encoder *encoder,
                }
 
                tmp = intel_de_read(dev_priv,
-                                   TRANS_DDI_FUNC_CTL(cpu_transcoder));
+                                   TRANS_DDI_FUNC_CTL(dev_priv, cpu_transcoder));
                intel_display_power_put(dev_priv, POWER_DOMAIN_TRANSCODER(cpu_transcoder),
                                        trans_wakeref);
 
@@ -3025,7 +3029,8 @@ static void intel_ddi_post_disable_dp(struct intel_atomic_state *state,
                if (is_mst) {
                        enum transcoder cpu_transcoder = old_crtc_state->cpu_transcoder;
 
-                       intel_de_rmw(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder),
+                       intel_de_rmw(dev_priv,
+                                    TRANS_DDI_FUNC_CTL(dev_priv, cpu_transcoder),
                                     TGL_TRANS_DDI_PORT_MASK | TRANS_DDI_MODE_SELECT_MASK,
                                     0);
                }
@@ -3759,7 +3764,8 @@ static enum transcoder bdw_transcoder_master_readout(struct drm_i915_private *de
 
                master_select = REG_FIELD_GET(PORT_SYNC_MODE_MASTER_SELECT_MASK, ctl2);
        } else {
-               u32 ctl = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
+               u32 ctl = intel_de_read(dev_priv,
+                                       TRANS_DDI_FUNC_CTL(dev_priv, cpu_transcoder));
 
                if ((ctl & TRANS_DDI_PORT_SYNC_ENABLE) == 0)
                        return INVALID_TRANSCODER;
@@ -3815,7 +3821,8 @@ static void intel_ddi_read_func_ctl(struct intel_encoder *encoder,
        struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
        u32 temp, flags = 0;
 
-       temp = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
+       temp = intel_de_read(dev_priv,
+                            TRANS_DDI_FUNC_CTL(dev_priv, cpu_transcoder));
        if (temp & TRANS_DDI_PHSYNC)
                flags |= DRM_MODE_FLAG_PHSYNC;
        else

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 952780028630b02da961ad7b5aad0909431e41db..62f8300c73a529c9915129053324c89da5ee11a5 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -3507,7 +3507,8 @@ static bool transcoder_ddi_func_is_enabled(struct drm_i915_private *dev_priv,
        power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder);
 
        with_intel_display_power_if_enabled(dev_priv, power_domain, wakeref)
-               tmp = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
+               tmp = intel_de_read(dev_priv,
+                                   TRANS_DDI_FUNC_CTL(dev_priv, cpu_transcoder));
 
        return tmp & TRANS_DDI_FUNC_ENABLE;
 }
@@ -3622,7 +3623,8 @@ static u8 hsw_enabled_transcoders(struct intel_crtc *crtc)
 
                power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder);
                with_intel_display_power_if_enabled(dev_priv, power_domain, wakeref)
-                       tmp = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
+                       tmp = intel_de_read(dev_priv,
+                                           TRANS_DDI_FUNC_CTL(dev_priv, cpu_transcoder));
 
                if (!(tmp & TRANS_DDI_FUNC_ENABLE))
                        continue;
@@ -3729,7 +3731,8 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
                return false;
 
        if (hsw_panel_transcoders(dev_priv) & BIT(pipe_config->cpu_transcoder)) {
-               tmp = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(pipe_config->cpu_transcoder));
+               tmp = intel_de_read(dev_priv,
+                                   TRANS_DDI_FUNC_CTL(dev_priv, pipe_config->cpu_transcoder));
 
                if ((tmp & TRANS_DDI_EDP_INPUT_MASK) == TRANS_DDI_EDP_INPUT_A_ONOFF)
                        pipe_config->pch_pfit.force_thru = true;

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index 0c0433aae26d8a73451ce47202db5ecb7b149647..176cfac741405b940706cf75ef7a164c24ba5144 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -935,7 +935,8 @@ static void gen11_dsi_te_interrupt_handler(struct drm_i915_private *dev_priv,
        }
 
        /* Get PIPE for handling VBLANK event */
-       val = intel_uncore_read(&dev_priv->uncore, TRANS_DDI_FUNC_CTL(dsi_trans));
+       val = intel_uncore_read(&dev_priv->uncore,
+                               TRANS_DDI_FUNC_CTL(dev_priv, dsi_trans));
        switch (val & TRANS_DDI_EDP_INPUT_MASK) {
        case TRANS_DDI_EDP_INPUT_A_ON:
                pipe = PIPE_A;

diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index c772ba19c5477aaab6ce7858d523d162c9d18b32..aa633844f8496aeda9212586ed9f9be3008304cf 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -1009,7 +1009,8 @@ static void intel_mst_post_disable_dp(struct intel_atomic_state *state,
 
        clear_act_sent(encoder, old_crtc_state);
 
-       intel_de_rmw(dev_priv, TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder),
+       intel_de_rmw(dev_priv,
+                    TRANS_DDI_FUNC_CTL(dev_priv, old_crtc_state->cpu_transcoder),
                     TRANS_DDI_DP_VC_PAYLOAD_ALLOC, 0);
 
        wait_for_act_sent(encoder, old_crtc_state);
@@ -1230,7 +1231,7 @@ static void intel_mst_enable_dp(struct intel_atomic_state *state,
 
        clear_act_sent(encoder, pipe_config);
 
-       intel_de_rmw(dev_priv, TRANS_DDI_FUNC_CTL(trans), 0,
+       intel_de_rmw(dev_priv, TRANS_DDI_FUNC_CTL(dev_priv, trans), 0,
                     TRANS_DDI_DP_VC_PAYLOAD_ALLOC);
 
        drm_dbg_kms(&dev_priv->drm, "active links %d\n",

diff --git a/drivers/gpu/drm/i915/display/intel_fdi.c b/drivers/gpu/drm/i915/display/intel_fdi.c
index 007e0f9e9304c111d1da1c5c0de88fad672753cd..d33befd7994d5d50b5ba2cea9c2b5f04ebb317a1 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_fdi.c
+++ b/drivers/gpu/drm/i915/display/intel_fdi.c
@@ -34,7 +34,8 @@ static void assert_fdi_tx(struct drm_i915_private *dev_priv,
                 * so pipe->transcoder cast is fine here.
                 */
                enum transcoder cpu_transcoder = (enum transcoder)pipe;
-               cur_state = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder)) & TRANS_DDI_FUNC_ENABLE;
+               cur_state = intel_de_read(dev_priv,
+                                         TRANS_DDI_FUNC_CTL(dev_priv, cpu_transcoder)) & TRANS_DDI_FUNC_ENABLE;
        } else {
                cur_state = intel_de_read(dev_priv, FDI_TX_CTL(pipe)) & FDI_TX_ENABLE;
        }

diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index ba3eca919900ac6e56313fd03b62bca7dc079af1..3ebe035f382ec914279cb83924ed2c6524bdf769 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -47,7 +47,8 @@ intel_hdcp_disable_hdcp_line_rekeying(struct intel_encoder *encoder,
                                     0, HDCP_LINE_REKEY_DISABLE);
                else if (IS_DISPLAY_IP_STEP(dev_priv, IP_VER(14, 1), STEP_B0, STEP_FOREVER) ||
                         IS_DISPLAY_IP_STEP(dev_priv, IP_VER(20, 0), STEP_B0, STEP_FOREVER))
-                       intel_de_rmw(dev_priv, TRANS_DDI_FUNC_CTL(hdcp->cpu_transcoder),
+                       intel_de_rmw(dev_priv,
+                                    TRANS_DDI_FUNC_CTL(dev_priv, hdcp->cpu_transcoder),
                                     0, TRANS_DDI_HDCP_LINE_REKEY_DISABLE);
        }
 }

diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 7704ead5002d46bbab4fcbc50e4dacc683ca55b6..19498ee455fa344fb3805af2fe231635659f5535 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -83,7 +83,7 @@ assert_hdmi_transcoder_func_disabled(struct drm_i915_private *dev_priv,
                                     enum transcoder cpu_transcoder)
 {
        drm_WARN(&dev_priv->drm,
-                intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder)) &
+                intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(dev_priv, cpu_transcoder)) &
                 TRANS_DDI_FUNC_ENABLE,
                 "HDMI transcoder function enabled, expecting disabled\n");
 }

diff --git a/drivers/gpu/drm/i915/gvt/display.c b/drivers/gpu/drm/i915/gvt/display.c
index 95b4b76d3b45542f4b4cb365acd0a748daf6273a..c66d6d3177c8128934da851aab59feb325f7b61b 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/display.c
+++ b/drivers/gpu/drm/i915/gvt/display.c
@@ -200,11 +200,11 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu)
                }
 
                for (trans = TRANSCODER_A; trans <= TRANSCODER_EDP; trans++) {
-                       vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(trans)) &=
+                       vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(dev_priv, trans)) &=
                                ~(TRANS_DDI_BPC_MASK | TRANS_DDI_MODE_SELECT_MASK |
                                  TRANS_DDI_PORT_MASK | TRANS_DDI_FUNC_ENABLE);
                }
-               vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(TRANSCODER_A)) &=
+               vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(dev_priv, TRANSCODER_A)) &=
                        ~(TRANS_DDI_BPC_MASK | TRANS_DDI_MODE_SELECT_MASK |
                          TRANS_DDI_PORT_MASK);
 
@@ -287,7 +287,8 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu)
                                (DDI_BUF_CTL_ENABLE | DDI_INIT_DISPLAY_DETECTED);
                        vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_A)) &=
                                ~DDI_BUF_IS_IDLE;
-                       vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(TRANSCODER_EDP)) |=
+                       vgpu_vreg_t(vgpu,
+                                   TRANS_DDI_FUNC_CTL(dev_priv, TRANSCODER_EDP)) |=
                                (TRANS_DDI_BPC_8 | TRANS_DDI_MODE_SELECT_DP_SST |
                                 TRANS_DDI_FUNC_ENABLE);
                        vgpu_vreg_t(vgpu, PCH_PORT_HOTPLUG) |=
@@ -316,7 +317,8 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu)
                                DDI_BUF_CTL_ENABLE;
                        vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_B)) &=
                                ~DDI_BUF_IS_IDLE;
-                       vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(TRANSCODER_A)) |=
+                       vgpu_vreg_t(vgpu,
+                                   TRANS_DDI_FUNC_CTL(dev_priv, TRANSCODER_A)) |=
                                (TRANS_DDI_BPC_8 | TRANS_DDI_MODE_SELECT_DP_SST |
                                 (PORT_B << TRANS_DDI_PORT_SHIFT) |
                                 TRANS_DDI_FUNC_ENABLE);
@@ -346,7 +348,8 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu)
                                DDI_BUF_CTL_ENABLE;
                        vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_C)) &=
                                ~DDI_BUF_IS_IDLE;
-                       vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(TRANSCODER_A)) |=
+                       vgpu_vreg_t(vgpu,
+                                   TRANS_DDI_FUNC_CTL(dev_priv, TRANSCODER_A)) |=
                                (TRANS_DDI_BPC_8 | TRANS_DDI_MODE_SELECT_DP_SST |
                                 (PORT_B << TRANS_DDI_PORT_SHIFT) |
                                 TRANS_DDI_FUNC_ENABLE);
@@ -410,10 +413,10 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu)
                vgpu_vreg_t(vgpu, DPLL_CTRL2) |=
                        DPLL_CTRL2_DDI_SEL_OVERRIDE(PORT_B);
                vgpu_vreg_t(vgpu, SFUSE_STRAP) |= SFUSE_STRAP_DDIB_DETECTED;
-               vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(TRANSCODER_A)) &=
+               vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(dev_priv, TRANSCODER_A)) &=
                        ~(TRANS_DDI_BPC_MASK | TRANS_DDI_MODE_SELECT_MASK |
                        TRANS_DDI_PORT_MASK);
-               vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(TRANSCODER_A)) |=
+               vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(dev_priv, TRANSCODER_A)) |=
                        (TRANS_DDI_BPC_8 | TRANS_DDI_MODE_SELECT_DP_SST |
                        (PORT_B << TRANS_DDI_PORT_SHIFT) |
                        TRANS_DDI_FUNC_ENABLE);
@@ -436,10 +439,10 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu)
                vgpu_vreg_t(vgpu, DPLL_CTRL2) |=
                        DPLL_CTRL2_DDI_SEL_OVERRIDE(PORT_C);
                vgpu_vreg_t(vgpu, SDEISR) |= SDE_PORTC_HOTPLUG_CPT;
-               vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(TRANSCODER_A)) &=
+               vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(dev_priv, TRANSCODER_A)) &=
                        ~(TRANS_DDI_BPC_MASK | TRANS_DDI_MODE_SELECT_MASK |
                        TRANS_DDI_PORT_MASK);
-               vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(TRANSCODER_A)) |=
+               vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(dev_priv, TRANSCODER_A)) |=
                        (TRANS_DDI_BPC_8 | TRANS_DDI_MODE_SELECT_DP_SST |
                        (PORT_C << TRANS_DDI_PORT_SHIFT) |
                        TRANS_DDI_FUNC_ENABLE);
@@ -462,10 +465,10 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu)
                vgpu_vreg_t(vgpu, DPLL_CTRL2) |=
                        DPLL_CTRL2_DDI_SEL_OVERRIDE(PORT_D);
                vgpu_vreg_t(vgpu, SDEISR) |= SDE_PORTD_HOTPLUG_CPT;
-               vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(TRANSCODER_A)) &=
+               vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(dev_priv, TRANSCODER_A)) &=
                        ~(TRANS_DDI_BPC_MASK | TRANS_DDI_MODE_SELECT_MASK |
                        TRANS_DDI_PORT_MASK);
-               vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(TRANSCODER_A)) |=
+               vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(dev_priv, TRANSCODER_A)) |=
                        (TRANS_DDI_BPC_8 | TRANS_DDI_MODE_SELECT_DP_SST |
                        (PORT_D << TRANS_DDI_PORT_SHIFT) |
                        TRANS_DDI_FUNC_ENABLE);

diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
index 7416068e7c825e09fa85c72dc0e7afab318fe490..073edabf24a50c86c00487d1222b6174ed22a1b8 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@ -656,7 +656,7 @@ static void vgpu_update_refresh_rate(struct intel_vgpu *vgpu)
        u32 dp_br, link_m, link_n, htotal, vtotal;
 
        /* Find DDI/PORT assigned to TRANSCODER_A, expect B or D */
-       port = (vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(TRANSCODER_A)) &
+       port = (vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(dev_priv, TRANSCODER_A)) &
                TRANS_DDI_PORT_MASK) >> TRANS_DDI_PORT_SHIFT;
        if (port != PORT_B && port != PORT_D) {
                gvt_dbg_dpy("vgpu-%d unsupported PORT_%c\n", vgpu->id, port_name(port));

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 5f822b8f17755ab64ee3220fd82fb6877c403be6..195f4993fe02bc0cca9443bcc84669ec9a936426 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3872,7 +3872,7 @@ enum skl_power_gate {
 #define _TRANS_DDI_FUNC_CTL_EDP                0x6F400
 #define _TRANS_DDI_FUNC_CTL_DSI0       0x6b400
 #define _TRANS_DDI_FUNC_CTL_DSI1       0x6bc00
-#define TRANS_DDI_FUNC_CTL(tran) _MMIO_TRANS2(dev_priv, tran, _TRANS_DDI_FUNC_CTL_A)
+#define TRANS_DDI_FUNC_CTL(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _TRANS_DDI_FUNC_CTL_A)
 
 #define  TRANS_DDI_FUNC_ENABLE         (1 << 31)
 /* Those bits are ignored by pipe EDP since it can only connect to DDI A */