bool                            in_suspend;
        bool                            in_hibernate;
 
+       /*
+        * The combination flag in_poweroff_reboot_com used to identify the poweroff
+        * and reboot opt in the s0i3 system-wide suspend.
+        */
+       bool                            in_poweroff_reboot_com;
+
        atomic_t                        in_gpu_reset;
        enum pp_mp1_state               mp1_state;
        struct rw_semaphore reset_sem;
 
 {
        int i, r;
 
-       if (!amdgpu_acpi_is_s0ix_supported(adev) || amdgpu_in_reset(adev)) {
+       if (adev->in_poweroff_reboot_com ||
+           !amdgpu_acpi_is_s0ix_supported(adev) || amdgpu_in_reset(adev)) {
                amdgpu_device_set_pg_state(adev, AMD_PG_STATE_UNGATE);
                amdgpu_device_set_cg_state(adev, AMD_CG_STATE_UNGATE);
        }
 
        amdgpu_fence_driver_suspend(adev);
 
-       if (!amdgpu_acpi_is_s0ix_supported(adev) || amdgpu_in_reset(adev))
+       if (adev->in_poweroff_reboot_com ||
+           !amdgpu_acpi_is_s0ix_supported(adev) || amdgpu_in_reset(adev))
                r = amdgpu_device_ip_suspend_phase2(adev);
        else
                amdgpu_gfx_state_change_set(adev, sGpuChangeState_D3Entry);
 
         */
        if (!amdgpu_passthrough(adev))
                adev->mp1_state = PP_MP1_STATE_UNLOAD;
+       adev->in_poweroff_reboot_com = true;
        amdgpu_device_ip_suspend(adev);
+       adev->in_poweroff_reboot_com = false;
        adev->mp1_state = PP_MP1_STATE_NONE;
 }
 
 static int amdgpu_pmops_poweroff(struct device *dev)
 {
        struct drm_device *drm_dev = dev_get_drvdata(dev);
+       struct amdgpu_device *adev = drm_to_adev(drm_dev);
+       int r;
 
-       return amdgpu_device_suspend(drm_dev, true);
+       adev->in_poweroff_reboot_com = true;
+       r =  amdgpu_device_suspend(drm_dev, true);
+       adev->in_poweroff_reboot_com = false;
+       return r;
 }
 
 static int amdgpu_pmops_restore(struct device *dev)