]> www.infradead.org Git - users/dwmw2/linux.git/commitdiff
drm/i915: Do .crtc_compute_clock() earlier
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 7 Sep 2022 09:10:45 +0000 (12:10 +0300)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 8 Sep 2022 11:20:24 +0000 (14:20 +0300)
Currently we calculate a lot of things (pixel rate, watermarks,
cdclk) trusting that the DPLL can generate the exact frequency
we ask it. In practice that is not true and there can be
certain amount of rounding involved.

To allow us to eventually get accurate numbers for all our
DPLL clock derived state we need to move the DPLL calculation
to hapen much earlier. To that end we hoist it up to the just
after the fastset checks. For now we just do the easy code
motion, and the actual back feeding of the final DPLL clock
into the state will come later.

A slight change here is that now .crtc_compute_clock()
can get called while the shared_dpll is still assigned.
But since .crtc_compute_clock() no longer assignes new
shared_dplls this is perfectly fine.

TODO: I'd actually like to do this before the fastset check
so that if the DPLL state should change we actually do the
modeset. Which I think is what the video aficionados want,
but it might not be what the fans of fastboot want. Not yet
sure how to reconcile those conflicting requirements...

v2: s/return/goto/ in error handling

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220907091057.11572-6-ville.syrjala@linux.intel.com
drivers/gpu/drm/i915/display/intel_display.c
drivers/gpu/drm/i915/display/intel_dpll.c

index 807a20626a79264ca1958e55483f2589bacaef6c..b07fc5f5b111a1722c4785d1f39eb93d14f69b86 100644 (file)
@@ -4820,10 +4820,6 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state,
                crtc_state->update_wm_post = true;
 
        if (mode_changed) {
-               ret = intel_dpll_crtc_compute_clock(state, crtc);
-               if (ret)
-                       return ret;
-
                ret = intel_dpll_crtc_get_shared_dpll(state, crtc);
                if (ret)
                        return ret;
@@ -6912,6 +6908,11 @@ static int intel_atomic_check(struct drm_device *dev,
                                            new_crtc_state, i) {
                if (intel_crtc_needs_modeset(new_crtc_state)) {
                        any_ms = true;
+
+                       ret = intel_dpll_crtc_compute_clock(state, crtc);
+                       if (ret)
+                               goto fail;
+
                        continue;
                }
 
index 81655fdf2c89597d26b3a3abf5958bf1fd8338eb..6b8d90d72e0017d1f01f788e7973ede306e02530 100644 (file)
@@ -1411,9 +1411,6 @@ int intel_dpll_crtc_compute_clock(struct intel_atomic_state *state,
 
        drm_WARN_ON(&i915->drm, !intel_crtc_needs_modeset(crtc_state));
 
-       if (drm_WARN_ON(&i915->drm, crtc_state->shared_dpll))
-               return 0;
-
        memset(&crtc_state->dpll_hw_state, 0,
               sizeof(crtc_state->dpll_hw_state));