--- /dev/null
+/*
+ * pxa2xx.dtsi - Device Tree Include file for Marvell PXA2xx family SoC
+ *
+ * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
+ *
+ * Licensed under GPLv2 or later.
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+       model = "Marvell PXA2xx family SoC";
+       compatible = "marvell,pxa2xx";
+       interrupt-parent = <&pxairq>;
+
+       aliases {
+               serial0 = &ffuart;
+               serial1 = &btuart;
+               serial2 = &stuart;
+               serial3 = &hwuart;
+               i2c0 = &pwri2c;
+               i2c1 = &pxai2c1;
+       };
+
+       cpus {
+               cpu@0 {
+                       compatible = "arm,xscale";
+               };
+       };
+
+       pxabus {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               pxairq: interrupt-controller@40d00000 {
+                       #interrupt-cells = <1>;
+                       compatible = "marvell,pxa-intc";
+                       interrupt-controller;
+                       interrupt-parent;
+                       marvell,intc-nr-irqs = <32>;
+                       reg = <0x40d00000 0xd0>;
+               };
+
+               gpio: gpio@40e00000 {
+                       compatible = "mrvl,pxa-gpio";
+                       #address-cells = <0x1>;
+                       #size-cells = <0x1>;
+                       reg = <0x40e00000 0x10000>;
+                       gpio-controller;
+                       #gpio-cells = <0x2>;
+                       interrupts = <10>;
+                       interrupt-names = "gpio_mux";
+                       interrupt-controller;
+                       #interrupt-cells = <0x2>;
+                       ranges;
+
+                       gcb0: gpio@40e00000 {
+                               reg = <0x40e00000 0x4>;
+                       };
+
+                       gcb1: gpio@40e00004 {
+                               reg = <0x40e00004 0x4>;
+                       };
+
+                       gcb2: gpio@40e00008 {
+                               reg = <0x40e00008 0x4>;
+                       };
+                       gcb3: gpio@40e0000c {
+                               reg = <0x40e0000c 0x4>;
+                       };
+               };
+
+               ffuart: uart@40100000 {
+                       compatible = "mrvl,pxa-uart";
+                       reg = <0x40100000 0x30>;
+                       interrupts = <22>;
+                       status = "disabled";
+               };
+
+               btuart: uart@40200000 {
+                       compatible = "mrvl,pxa-uart";
+                       reg = <0x40200000 0x30>;
+                       interrupts = <21>;
+                       status = "disabled";
+               };
+
+               stuart: uart@40700000 {
+                       compatible = "mrvl,pxa-uart";
+                       reg = <0x40700000 0x30>;
+                       interrupts = <20>;
+                       status = "disabled";
+               };
+
+               hwuart: uart@41100000 {
+                       compatible = "mrvl,pxa-uart";
+                       reg = <0x41100000 0x30>;
+                       interrupts = <7>;
+                       status = "disabled";
+               };
+
+               pxai2c1: i2c@40301680 {
+                       compatible = "mrvl,pxa-i2c";
+                       reg = <0x40301680 0x30>;
+                       interrupts = <18>;
+                       #address-cells = <0x1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
+               usb0: ohci@4c000000 {
+                       compatible = "mrvl,pxa-ohci";
+                       reg = <0x4c000000 0x10000>;
+                       interrupts = <3>;
+                       status = "disabled";
+               };
+
+               mmc0: mmc@41100000 {
+                       compatible = "mrvl,pxa-mmc";
+                       reg = <0x41100000 0x1000>;
+                       interrupts = <23>;
+                       status = "disabled";
+               };
+
+               rtc@40900000 {
+                       compatible = "marvell,pxa-rtc";
+                       reg = <0x40900000 0x3c>;
+                       interrupts = <30 31>;
+               };
+       };
+};
 
--- /dev/null
+/* The pxa3xx skeleton simply augments the 2xx version */
+/include/ "pxa2xx.dtsi"
+
+/ {
+       model = "Marvell PXA3xx familiy SoC";
+       compatible = "marvell,pxa3xx";
+
+       pxabus {
+               pwri2c: i2c@40f500c0 {
+                       compatible = "mrvl,pwri2c";
+                       reg = <0x40f500c0 0x30>;
+                       interrupts = <6>;
+                       #address-cells = <0x1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
+               nand0: nand@43100000 {
+                       compatible = "marvell,pxa3xx-nand";
+                       reg = <0x43100000 90>;
+                       interrupts = <45>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;      
+                       status = "disabled";
+               };
+
+               pxairq: interrupt-controller@40d00000 {
+                       marvell,intc-priority;
+                       marvell,intc-nr-irqs = <56>;
+               };
+       };
+};