/* Restart the device on a Fatal Bus Error */
                if (XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, FBE))
-                       schedule_work(&pdata->restart_work);
+                       queue_work(pdata->dev_workqueue, &pdata->restart_work);
 
                /* Clear all interrupt signals */
                XGMAC_DMA_IOWRITE(channel, DMA_CH_SR, dma_ch_isr);
                                /* Read Tx Timestamp to clear interrupt */
                                pdata->tx_tstamp =
                                        hw_if->get_tx_tstamp(pdata);
-                               schedule_work(&pdata->tx_tstamp_work);
+                               queue_work(pdata->dev_workqueue,
+                                          &pdata->tx_tstamp_work);
                        }
                }
        }
 {
        struct xgbe_prv_data *pdata = (struct xgbe_prv_data *)data;
 
-       schedule_work(&pdata->service_work);
+       queue_work(pdata->dev_workqueue, &pdata->service_work);
 
        mod_timer(&pdata->service_timer, jiffies + HZ);
 }
        netif_tx_start_all_queues(netdev);
 
        xgbe_start_timers(pdata);
-       schedule_work(&pdata->service_work);
+       queue_work(pdata->dev_workqueue, &pdata->service_work);
 
        DBGPR("<--xgbe_start\n");
 
        struct xgbe_prv_data *pdata = netdev_priv(netdev);
 
        netdev_warn(netdev, "tx timeout, device restarting\n");
-       schedule_work(&pdata->restart_work);
+       queue_work(pdata->dev_workqueue, &pdata->restart_work);
 }
 
 static struct rtnl_link_stats64 *xgbe_get_stats64(struct net_device *netdev,