u32                     chconf0;
 };
 
-#define MOD_REG_BIT(val, mask, set) do { \
-       if (set) \
-               val |= mask; \
-       else \
-               val &= ~mask; \
-} while (0)
-
 static inline void mcspi_write_reg(struct spi_master *master,
                int idx, u32 val)
 {
        else
                rw = OMAP2_MCSPI_CHCONF_DMAW;
 
-       MOD_REG_BIT(l, rw, enable);
+       if (enable)
+               l |= rw;
+       else
+               l &= ~rw;
+
        mcspi_write_chconf0(spi, l);
 }
 
        u32 l;
 
        l = mcspi_cached_chconf0(spi);
-       MOD_REG_BIT(l, OMAP2_MCSPI_CHCONF_FORCE, cs_active);
+       if (cs_active)
+               l |= OMAP2_MCSPI_CHCONF_FORCE;
+       else
+               l &= ~OMAP2_MCSPI_CHCONF_FORCE;
+
        mcspi_write_chconf0(spi, l);
 }
 
         * to single-channel master mode
         */
        l = mcspi_read_reg(master, OMAP2_MCSPI_MODULCTRL);
-       MOD_REG_BIT(l, OMAP2_MCSPI_MODULCTRL_STEST, 0);
-       MOD_REG_BIT(l, OMAP2_MCSPI_MODULCTRL_MS, 0);
-       MOD_REG_BIT(l, OMAP2_MCSPI_MODULCTRL_SINGLE, 1);
+       l &= ~(OMAP2_MCSPI_MODULCTRL_STEST | OMAP2_MCSPI_MODULCTRL_MS);
+       l |= OMAP2_MCSPI_MODULCTRL_SINGLE;
        mcspi_write_reg(master, OMAP2_MCSPI_MODULCTRL, l);
 
        ctx->modulctrl = l;
                         * We need to toggle CS state for OMAP take this
                         * change in account.
                         */
-                       MOD_REG_BIT(cs->chconf0, OMAP2_MCSPI_CHCONF_FORCE, 1);
+                       cs->chconf0 |= OMAP2_MCSPI_CHCONF_FORCE;
                        __raw_writel(cs->chconf0, cs->base + OMAP2_MCSPI_CHCONF0);
-                       MOD_REG_BIT(cs->chconf0, OMAP2_MCSPI_CHCONF_FORCE, 0);
+                       cs->chconf0 &= ~OMAP2_MCSPI_CHCONF_FORCE;
                        __raw_writel(cs->chconf0, cs->base + OMAP2_MCSPI_CHCONF0);
                }
        }