]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
staging: rtl8192e: Join constants RadioB_ArrayLength with ..LengthPciE
authorPhilipp Hortmann <philipp.g.hortmann@gmail.com>
Tue, 14 Mar 2023 18:43:18 +0000 (19:43 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 16 Mar 2023 08:37:18 +0000 (09:37 +0100)
Join constants RadioB_ArrayLength with RadioB_ArrayLengthPciE to
RTL8192E_RADIO_B_ARR_LEN to improve readability.

Signed-off-by: Philipp Hortmann <philipp.g.hortmann@gmail.com>
Link: https://lore.kernel.org/r/1f48c0691eb4627be81fc39d08762617a6c58a08.1678814935.git.philipp.g.hortmann@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c
drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h
drivers/staging/rtl8192e/rtl8192e/table.c
drivers/staging/rtl8192e/rtl8192e/table.h

index e4d1b7ad64ac56f53657bdec46432f7137818319..e42b77f915283bf9bc4b847d0fcdc40ba153f47b 100644 (file)
@@ -554,7 +554,7 @@ u8 rtl92e_config_rf_path(struct net_device *dev, enum rf90_radio_path eRFPath)
                }
                break;
        case RF90_PATH_B:
-               for (i = 0; i < RadioB_ArrayLength; i += 2) {
+               for (i = 0; i < RTL8192E_RADIO_B_ARR_LEN; i += 2) {
                        if (Rtl819XRadioB_Array[i] == 0xfe) {
                                msleep(100);
                                continue;
index 8f9200bed456234a60f04f4f682ba93e4c2bb0f7..e9ff224953f964637c7af3be3a67167a67e06a79 100644 (file)
@@ -9,7 +9,6 @@
 
 #define MAX_DOZE_WAITING_TIMES_9x 64
 
-#define RadioB_ArrayLength                     RadioB_ArrayLengthPciE
 #define MACPHY_Array_PGLength                  MACPHY_Array_PGLengthPciE
 #define PHY_REG_1T2RArrayLength                        PHY_REG_1T2RArrayLengthPciE
 
index 5820c47f4e14691b2c074f3ed39a98cb09d31af3..5c9844f4d1174b7a8d002339e3fad042578b92f3 100644 (file)
@@ -283,7 +283,7 @@ u32 Rtl8192PciERadioA_Array[RTL8192E_RADIO_A_ARR_LEN] = {
        0x007, 0x00000700,
 };
 
-u32 Rtl8192PciERadioB_Array[RadioB_ArrayLengthPciE] = {
+u32 Rtl8192PciERadioB_Array[RTL8192E_RADIO_B_ARR_LEN] = {
        0x019, 0x00000003,
        0x000, 0x000000bf,
        0x001, 0x000006e0,
index d177b7b17b199e88cdd820f5a9c6c5310fee8d7f..174a4dfb1855843bd96c4df61c30d697526ae98c 100644 (file)
@@ -15,8 +15,8 @@
 extern u32 Rtl8192PciEPHY_REG_1T2RArray[PHY_REG_1T2RArrayLengthPciE];
 #define RTL8192E_RADIO_A_ARR_LEN 246
 extern u32 Rtl8192PciERadioA_Array[RTL8192E_RADIO_A_ARR_LEN];
-#define RadioB_ArrayLengthPciE 78
-extern u32 Rtl8192PciERadioB_Array[RadioB_ArrayLengthPciE];
+#define RTL8192E_RADIO_B_ARR_LEN 78
+extern u32 Rtl8192PciERadioB_Array[RTL8192E_RADIO_B_ARR_LEN];
 #define RTL8192E_MACPHY_ARR_LEN 18
 extern u32 Rtl8192PciEMACPHY_Array[RTL8192E_MACPHY_ARR_LEN];
 #define MACPHY_Array_PGLengthPciE 30