*/
        clk_set_parent(&ssp_clk, &ref_io_clk);
 
-       clk_enable(&cpu_clk);
-       clk_enable(&hbus_clk);
-       clk_enable(&xbus_clk);
-       clk_enable(&emi_clk);
-       clk_enable(&uart_clk);
+       clk_prepare_enable(&cpu_clk);
+       clk_prepare_enable(&hbus_clk);
+       clk_prepare_enable(&xbus_clk);
+       clk_prepare_enable(&emi_clk);
+       clk_prepare_enable(&uart_clk);
 
        clkdev_add_table(lookups, ARRAY_SIZE(lookups));
 
 
        clk_set_parent(&ssp0_clk, &ref_io0_clk);
        clk_set_parent(&ssp1_clk, &ref_io0_clk);
 
-       clk_enable(&cpu_clk);
-       clk_enable(&hbus_clk);
-       clk_enable(&xbus_clk);
-       clk_enable(&emi_clk);
-       clk_enable(&uart_clk);
+       clk_prepare_enable(&cpu_clk);
+       clk_prepare_enable(&hbus_clk);
+       clk_prepare_enable(&xbus_clk);
+       clk_prepare_enable(&emi_clk);
+       clk_prepare_enable(&uart_clk);
 
        clk_set_parent(&lcdif_clk, &ref_pix_clk);
        clk_set_parent(&saif0_clk, &pll0_clk);
 
                return ret;
 
        if (clk->usecount)
-               clk_enable(parent);
+               clk_prepare_enable(parent);
 
        mutex_lock(&clocks_mutex);
        ret = clk->set_parent(clk, parent);
 
        /* Enable fec phy clock */
        clk = clk_get_sys("pll2", NULL);
        if (!IS_ERR(clk))
-               clk_enable(clk);
+               clk_prepare_enable(clk);
 
        /* Power up fec phy */
        ret = gpio_request(MX28EVK_FEC_PHY_POWER, "fec-phy-power");
 
 
        clk = clk_get_sys("rtc", NULL);
        if (!IS_ERR(clk))
-               clk_enable(clk);
+               clk_prepare_enable(clk);
 
        return 0;
 }
 
 
 void __init mxs_timer_init(struct clk *timer_clk, int irq)
 {
-       clk_enable(timer_clk);
+       clk_prepare_enable(timer_clk);
 
        /*
         * Initialize timers to a known state