.notify_memory_pool_location = smu_v11_0_notify_memory_pool_location,
        .system_features_control = smu_v11_0_system_features_control,
        .send_smc_msg_with_param = smu_v11_0_send_msg_with_param,
-       .read_smc_arg = smu_v11_0_read_arg,
        .init_display_count = smu_v11_0_init_display_count,
        .set_allowed_mask = smu_v11_0_set_allowed_mask,
        .get_enabled_mask = smu_v11_0_get_enabled_mask,
 
        int (*system_features_control)(struct smu_context *smu, bool en);
        int (*send_smc_msg_with_param)(struct smu_context *smu,
                                       enum smu_message_type msg, uint32_t param, uint32_t *read_arg);
-       int (*read_smc_arg)(struct smu_context *smu, uint32_t *arg);
        int (*init_display_count)(struct smu_context *smu, uint32_t count);
        int (*set_allowed_mask)(struct smu_context *smu);
        int (*get_enabled_mask)(struct smu_context *smu, uint32_t *feature_mask, uint32_t num);
 
        BACO_SEQ_COUNT,
 };
 
-int smu_v11_0_read_arg(struct smu_context *smu, uint32_t *arg);
-
 int smu_v11_0_init_microcode(struct smu_context *smu);
 
 int smu_v11_0_load_microcode(struct smu_context *smu);
 
 int smu_v12_0_send_msg_without_waiting(struct smu_context *smu,
                                              uint16_t msg);
 
-int smu_v12_0_read_arg(struct smu_context *smu, uint32_t *arg);
-
 int smu_v12_0_wait_for_response(struct smu_context *smu);
 
 int
 
        .notify_memory_pool_location = smu_v11_0_notify_memory_pool_location,
        .system_features_control = smu_v11_0_system_features_control,
        .send_smc_msg_with_param = smu_v11_0_send_msg_with_param,
-       .read_smc_arg = smu_v11_0_read_arg,
        .init_display_count = smu_v11_0_init_display_count,
        .set_allowed_mask = smu_v11_0_set_allowed_mask,
        .get_enabled_mask = smu_v11_0_get_enabled_mask,
 
        .powergate_vcn = smu_v12_0_powergate_vcn,
        .powergate_jpeg = smu_v12_0_powergate_jpeg,
        .send_smc_msg_with_param = smu_v12_0_send_msg_with_param,
-       .read_smc_arg = smu_v12_0_read_arg,
        .set_gfx_cgpg = smu_v12_0_set_gfx_cgpg,
        .gfx_off_control = smu_v12_0_gfx_off_control,
        .init_smc_tables = smu_v12_0_init_smc_tables,
 
        return smu_send_smc_msg_with_param(smu, msg, 0, read_arg);
 }
 
-#define smu_read_smc_arg(smu, arg) \
-       ((smu)->ppt_funcs->read_smc_arg? (smu)->ppt_funcs->read_smc_arg((smu), (arg)) : 0)
 #define smu_alloc_dpm_context(smu) \
        ((smu)->ppt_funcs->alloc_dpm_context ? (smu)->ppt_funcs->alloc_dpm_context((smu)) : 0)
 #define smu_init_display_count(smu, count) \
 
        return 0;
 }
 
-int smu_v11_0_read_arg(struct smu_context *smu, uint32_t *arg)
+static int smu_v11_0_read_arg(struct smu_context *smu, uint32_t *arg)
 {
        struct amdgpu_device *adev = smu->adev;
 
 
        return 0;
 }
 
-int smu_v12_0_read_arg(struct smu_context *smu, uint32_t *arg)
+static int smu_v12_0_read_arg(struct smu_context *smu, uint32_t *arg)
 {
        struct amdgpu_device *adev = smu->adev;
 
 
        .notify_memory_pool_location = smu_v11_0_notify_memory_pool_location,
        .system_features_control = smu_v11_0_system_features_control,
        .send_smc_msg_with_param = smu_v11_0_send_msg_with_param,
-       .read_smc_arg = smu_v11_0_read_arg,
        .init_display_count = smu_v11_0_init_display_count,
        .set_allowed_mask = smu_v11_0_set_allowed_mask,
        .get_enabled_mask = smu_v11_0_get_enabled_mask,