]> www.infradead.org Git - users/dwmw2/linux.git/commitdiff
net: pse-pd: pd692x0: Expand ethtool status message
authorKory Maincent (Dent Project) <kory.maincent@bootlin.com>
Thu, 4 Jul 2024 08:11:58 +0000 (10:11 +0200)
committerJakub Kicinski <kuba@kernel.org>
Sat, 6 Jul 2024 01:30:00 +0000 (18:30 -0700)
This update expands pd692x0_ethtool_get_status() callback with newly
introduced details such as the detected class, current power delivered,
and extended state information.

Acked-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Link: https://patch.msgid.link/20240704-feature_poe_power_cap-v6-3-320003204264@bootlin.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
drivers/net/pse-pd/pd692x0.c

index 820358b71f0f6d9a1a7c2171551878ad3a82b7a9..cce1b7ce044b019b9449713766caecd529a43edc 100644 (file)
@@ -73,6 +73,7 @@ enum {
        PD692X0_MSG_SET_PORT_PARAM,
        PD692X0_MSG_GET_PORT_STATUS,
        PD692X0_MSG_DOWNLOAD_CMD,
+       PD692X0_MSG_GET_PORT_CLASS,
 
        /* add new message above here */
        PD692X0_MSG_CNT
@@ -149,6 +150,12 @@ static const struct pd692x0_msg pd692x0_msg_template_list[PD692X0_MSG_CNT] = {
                .data = {0x16, 0x16, 0x99, 0x4e,
                         0x4e, 0x4e, 0x4e, 0x4e},
        },
+       [PD692X0_MSG_GET_PORT_CLASS] = {
+               .key = PD692X0_KEY_REQ,
+               .sub = {0x05, 0xc4},
+               .data = {0x4e, 0x4e, 0x4e, 0x4e,
+                        0x4e, 0x4e, 0x4e, 0x4e},
+       },
 };
 
 static u8 pd692x0_build_msg(struct pd692x0_msg *msg, u8 echo)
@@ -435,6 +442,84 @@ static int pd692x0_pi_is_enabled(struct pse_controller_dev *pcdev, int id)
        }
 }
 
+struct pd692x0_pse_ext_state_mapping {
+       u32 status_code;
+       enum ethtool_c33_pse_ext_state pse_ext_state;
+       u32 pse_ext_substate;
+};
+
+static const struct pd692x0_pse_ext_state_mapping
+pd692x0_pse_ext_state_map[] = {
+       {0x06, ETHTOOL_C33_PSE_EXT_STATE_OPTION_VPORT_LIM,
+               ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_VPORT_LIM_HIGH_VOLTAGE},
+       {0x07, ETHTOOL_C33_PSE_EXT_STATE_OPTION_VPORT_LIM,
+               ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_VPORT_LIM_LOW_VOLTAGE},
+       {0x08, ETHTOOL_C33_PSE_EXT_STATE_MR_PSE_ENABLE,
+               ETHTOOL_C33_PSE_EXT_SUBSTATE_MR_PSE_ENABLE_DISABLE_PIN_ACTIVE},
+       {0x0C, ETHTOOL_C33_PSE_EXT_STATE_ERROR_CONDITION,
+               ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_NON_EXISTING_PORT},
+       {0x11, ETHTOOL_C33_PSE_EXT_STATE_ERROR_CONDITION,
+               ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_UNDEFINED_PORT},
+       {0x12, ETHTOOL_C33_PSE_EXT_STATE_ERROR_CONDITION,
+               ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_INTERNAL_HW_FAULT},
+       {0x1B, ETHTOOL_C33_PSE_EXT_STATE_OPTION_DETECT_TED,
+               ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_DETECT_TED_DET_IN_PROCESS},
+       {0x1C, ETHTOOL_C33_PSE_EXT_STATE_ERROR_CONDITION,
+               ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_UNKNOWN_PORT_STATUS},
+       {0x1E, ETHTOOL_C33_PSE_EXT_STATE_MR_MPS_VALID,
+               ETHTOOL_C33_PSE_EXT_SUBSTATE_MR_MPS_VALID_DETECTED_UNDERLOAD},
+       {0x1F, ETHTOOL_C33_PSE_EXT_STATE_OVLD_DETECTED,
+               ETHTOOL_C33_PSE_EXT_SUBSTATE_OVLD_DETECTED_OVERLOAD},
+       {0x20, ETHTOOL_C33_PSE_EXT_STATE_POWER_NOT_AVAILABLE,
+               ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_BUDGET_EXCEEDED},
+       {0x21, ETHTOOL_C33_PSE_EXT_STATE_ERROR_CONDITION,
+               ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_INTERNAL_HW_FAULT},
+       {0x22, ETHTOOL_C33_PSE_EXT_STATE_ERROR_CONDITION,
+               ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_CONFIG_CHANGE},
+       {0x24, ETHTOOL_C33_PSE_EXT_STATE_OPTION_VPORT_LIM,
+               ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_VPORT_LIM_VOLTAGE_INJECTION},
+       {0x25, ETHTOOL_C33_PSE_EXT_STATE_ERROR_CONDITION,
+               ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_UNKNOWN_PORT_STATUS},
+       {0x34, ETHTOOL_C33_PSE_EXT_STATE_SHORT_DETECTED,
+               ETHTOOL_C33_PSE_EXT_SUBSTATE_SHORT_DETECTED_SHORT_CONDITION},
+       {0x35, ETHTOOL_C33_PSE_EXT_STATE_ERROR_CONDITION,
+               ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_DETECTED_OVER_TEMP},
+       {0x36, ETHTOOL_C33_PSE_EXT_STATE_ERROR_CONDITION,
+               ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_DETECTED_OVER_TEMP},
+       {0x37, ETHTOOL_C33_PSE_EXT_STATE_ERROR_CONDITION,
+               ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_UNKNOWN_PORT_STATUS},
+       {0x3C, ETHTOOL_C33_PSE_EXT_STATE_POWER_NOT_AVAILABLE,
+               ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_PORT_PW_LIMIT_EXCEEDS_CONTROLLER_BUDGET},
+       {0x3D, ETHTOOL_C33_PSE_EXT_STATE_POWER_NOT_AVAILABLE,
+               ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_PD_REQUEST_EXCEEDS_PORT_LIMIT},
+       {0x41, ETHTOOL_C33_PSE_EXT_STATE_POWER_NOT_AVAILABLE,
+               ETHTOOL_C33_PSE_EXT_SUBSTATE_POWER_NOT_AVAILABLE_HW_PW_LIMIT},
+       {0x43, ETHTOOL_C33_PSE_EXT_STATE_ERROR_CONDITION,
+               ETHTOOL_C33_PSE_EXT_SUBSTATE_ERROR_CONDITION_UNKNOWN_PORT_STATUS},
+       {0xA7, ETHTOOL_C33_PSE_EXT_STATE_OPTION_DETECT_TED,
+               ETHTOOL_C33_PSE_EXT_SUBSTATE_OPTION_DETECT_TED_CONNECTION_CHECK_ERROR},
+       {0xA8, ETHTOOL_C33_PSE_EXT_STATE_MR_MPS_VALID,
+               ETHTOOL_C33_PSE_EXT_SUBSTATE_MR_MPS_VALID_CONNECTION_OPEN},
+       { /* sentinel */ }
+};
+
+static void
+pd692x0_get_ext_state(struct ethtool_c33_pse_ext_state_info *c33_ext_state_info,
+                     u32 status_code)
+{
+       const struct pd692x0_pse_ext_state_mapping *ext_state_map;
+
+       ext_state_map = pd692x0_pse_ext_state_map;
+       while (ext_state_map->status_code) {
+               if (ext_state_map->status_code == status_code) {
+                       c33_ext_state_info->c33_pse_ext_state = ext_state_map->pse_ext_state;
+                       c33_ext_state_info->__c33_pse_ext_substate = ext_state_map->pse_ext_substate;
+                       return;
+               }
+               ext_state_map++;
+       }
+}
+
 static int pd692x0_ethtool_get_status(struct pse_controller_dev *pcdev,
                                      unsigned long id,
                                      struct netlink_ext_ack *extack,
@@ -442,6 +527,7 @@ static int pd692x0_ethtool_get_status(struct pse_controller_dev *pcdev,
 {
        struct pd692x0_priv *priv = to_pd692x0_priv(pcdev);
        struct pd692x0_msg msg, buf = {0};
+       u32 class;
        int ret;
 
        ret = pd692x0_fw_unavailable(priv);
@@ -471,6 +557,21 @@ static int pd692x0_ethtool_get_status(struct pse_controller_dev *pcdev,
 
        priv->admin_state[id] = status->c33_admin_state;
 
+       pd692x0_get_ext_state(&status->c33_ext_state_info, buf.sub[0]);
+
+       status->c33_actual_pw = (buf.data[0] << 4 | buf.data[1]) * 100;
+
+       memset(&buf, 0, sizeof(buf));
+       msg = pd692x0_msg_template_list[PD692X0_MSG_GET_PORT_CLASS];
+       msg.sub[2] = id;
+       ret = pd692x0_sendrecv_msg(priv, &msg, &buf);
+       if (ret < 0)
+               return ret;
+
+       class = buf.data[3] >> 4;
+       if (class <= 8)
+               status->c33_pw_class = class;
+
        return 0;
 }