usb: musb: abstract out ULPI_BUSCONTROL register reads/writes

The USB PHY on current Blackfin processors is a UTMI+ level 2 PHY.
However, it has no ULPI support - so there are no registers at all.
That means accesses to ULPI_BUSCONTROL have to be abstracted away
like other MUSB registers.

This fixes building for Blackfin parts again.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Anand Gadiyar <gadiyar@ti.com>
Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
index b4bbf8f2c2381bb0f4de4d0042b85b2260a843d0..e54e468c567259a3818aeee8f6b15e61f81033b6 100644 (file)
--- a/drivers/usb/musb/musb_core.c
+++ b/drivers/usb/musb/musb_core.c
@@ -2007,7 +2007,6 @@ bad_config:
        /* host side needs more setup */
        if (is_host_enabled(musb)) {
                struct usb_hcd  *hcd = musb_to_hcd(musb);
-               u8 busctl;
 
                otg_set_host(musb->xceiv, &hcd->self);
 
@@ -2018,9 +2017,9 @@ bad_config:
 
                /* program PHY to use external vBus if required */
                if (plat->extvbus) {
-                       busctl = musb_readb(musb->mregs, MUSB_ULPI_BUSCONTROL);
+                       u8 busctl = musb_read_ulpi_buscontrol(musb->mregs);
                        busctl |= MUSB_ULPI_USE_EXTVBUS;
-                       musb_writeb(musb->mregs, MUSB_ULPI_BUSCONTROL, busctl);
+                       musb_write_ulpi_buscontrol(musb->mregs, busctl);
                }
        }
 

diff --git a/drivers/usb/musb/musb_regs.h b/drivers/usb/musb/musb_regs.h
index 8d8062b10e2ff5749394bb9f64099fdbab2adfdb..327d0edd210ebbcb114f1d054428aafb391b5915 100644 (file)
--- a/drivers/usb/musb/musb_regs.h
+++ b/drivers/usb/musb/musb_regs.h
@@ -326,6 +326,11 @@ static inline void  musb_write_rxfifoadd(void __iomem *mbase, u16 c_off)
        musb_writew(mbase, MUSB_RXFIFOADD, c_off);
 }
 
+static inline void musb_write_ulpi_buscontrol(void __iomem *mbase, u8 val)
+{
+       musb_writeb(mbase, MUSB_ULPI_BUSCONTROL, val);
+}
+
 static inline u8 musb_read_txfifosz(void __iomem *mbase)
 {
        return musb_readb(mbase, MUSB_TXFIFOSZ);
@@ -346,6 +351,11 @@ static inline u16  musb_read_rxfifoadd(void __iomem *mbase)
        return musb_readw(mbase, MUSB_RXFIFOADD);
 }
 
+static inline u8 musb_read_ulpi_buscontrol(void __iomem *mbase)
+{
+       return musb_readb(mbase, MUSB_ULPI_BUSCONTROL);
+}
+
 static inline u8 musb_read_configdata(void __iomem *mbase)
 {
        musb_writeb(mbase, MUSB_INDEX, 0);
@@ -510,6 +520,10 @@ static inline void  musb_write_rxfifoadd(void __iomem *mbase, u16 c_off)
 {
 }
 
+static inline void musb_write_ulpi_buscontrol(void __iomem *mbase, u8 val)
+{
+}
+
 static inline u8 musb_read_txfifosz(void __iomem *mbase)
 {
 }
@@ -526,6 +540,11 @@ static inline u16  musb_read_rxfifoadd(void __iomem *mbase)
 {
 }
 
+static inline u8 musb_read_ulpi_buscontrol(void __iomem *mbase)
+{
+       return 0;
+}
+
 static inline u8 musb_read_configdata(void __iomem *mbase)
 {
        return 0;