In INTA mode, cnic and bnx2x share the same IRQ.  During chip reset,
for example, cnic will stop servicing IRQs after it has shutdown the
cnic hardware resources.  However, the shared IRQ is still active as
bnx2x needs to finish the reset.  There is a window when bnx2x does
not know that cnic is no longer handling IRQ and things don't always
work properly.
Add a flag to tell bnx2x that cnic is handling IRQ.  The flag is set
before the first cnic IRQ is expected and cleared when no more cnic
IRQs are expected, so there should be no race conditions.
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: Yuval Mintz <yuvalmin@broadcom.com>
Signed-off-by: Ariel Elior <ariele@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
                if (status & (mask | 0x1)) {
                        struct cnic_ops *c_ops = NULL;
 
-                       if (likely(bp->state == BNX2X_STATE_OPEN)) {
-                               rcu_read_lock();
-                               c_ops = rcu_dereference(bp->cnic_ops);
-                               if (c_ops)
-                                       c_ops->cnic_handler(bp->cnic_data,
-                                                           NULL);
-                               rcu_read_unlock();
-                       }
+                       rcu_read_lock();
+                       c_ops = rcu_dereference(bp->cnic_ops);
+                       if (c_ops && (bp->cnic_eth_dev.drv_state &
+                                     CNIC_DRV_STATE_HANDLES_IRQ))
+                               c_ops->cnic_handler(bp->cnic_data, NULL);
+                       rcu_read_unlock();
 
                        status &= ~mask;
                }
 
                return err;
        }
 
+       ethdev->drv_state |= CNIC_DRV_STATE_HANDLES_IRQ;
+
        return 0;
 }
 
        if (ret)
                return ret;
 
+       ethdev->drv_state |= CNIC_DRV_STATE_HANDLES_IRQ;
        return 0;
 }
 
                }
                cnic_shutdown_rings(dev);
                cp->stop_cm(dev);
+               cp->ethdev->drv_state &= ~CNIC_DRV_STATE_HANDLES_IRQ;
                clear_bit(CNIC_F_CNIC_UP, &dev->flags);
                RCU_INIT_POINTER(cp->ulp_ops[CNIC_ULP_L4], NULL);
                synchronize_rcu();
 
 #define CNIC_DRV_STATE_NO_ISCSI_OOO    0x00000004
 #define CNIC_DRV_STATE_NO_ISCSI                0x00000008
 #define CNIC_DRV_STATE_NO_FCOE         0x00000010
+#define CNIC_DRV_STATE_HANDLES_IRQ     0x00000020
        u32             chip_id;
        u32             max_kwqe_pending;
        struct pci_dev  *pdev;