drm/xe/pf: Program LMTT directory pointer on all GTs within a tile

Previously, the LMTT directory pointer was only programmed for primary GT
within a tile. However, to ensure correct Local Memory access by VFs,
the LMTT configuration must be programmed on all GTs within the tile.
Lets program the LMTT directory pointer on every GT of the tile
to guarantee proper LMEM access across all GTs on VFs.

HSD: 18042797646
Bspec: 67468
Signed-off-by: Piotr Piórkowski <piotr.piorkowski@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Reviewed-by: Stuart Summers <stuart.summers@intel.com>
Link: https://lore.kernel.org/r/20250805091850.1508240-1-piotr.piorkowski@intel.com
Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>

diff --git a/drivers/gpu/drm/xe/xe_lmtt.c b/drivers/gpu/drm/xe/xe_lmtt.c
index a2000307d5bf95f52915632126915cd08d984f73..a78c9d474a6efb2962f0c10dc3097a7a93866157 100644 (file)
--- a/drivers/gpu/drm/xe/xe_lmtt.c
+++ b/drivers/gpu/drm/xe/xe_lmtt.c
@@ -195,14 +195,17 @@ static void lmtt_setup_dir_ptr(struct xe_lmtt *lmtt)
        struct xe_tile *tile = lmtt_to_tile(lmtt);
        struct xe_device *xe = tile_to_xe(tile);
        dma_addr_t offset = xe_bo_main_addr(lmtt->pd->bo, XE_PAGE_SIZE);
+       struct xe_gt *gt;
+       u8 id;
 
        lmtt_debug(lmtt, "DIR offset %pad\n", &offset);
        lmtt_assert(lmtt, xe_bo_is_vram(lmtt->pd->bo));
        lmtt_assert(lmtt, IS_ALIGNED(offset, SZ_64K));
 
-       xe_mmio_write32(&tile->mmio,
-                       GRAPHICS_VER(xe) >= 20 ? XE2_LMEM_CFG : LMEM_CFG,
-                       LMEM_EN | REG_FIELD_PREP(LMTT_DIR_PTR, offset / SZ_64K));
+       for_each_gt_on_tile(gt, tile, id)
+               xe_mmio_write32(&gt->mmio,
+                               GRAPHICS_VER(xe) >= 20 ? XE2_LMEM_CFG : LMEM_CFG,
+                               LMEM_EN | REG_FIELD_PREP(LMTT_DIR_PTR, offset / SZ_64K));
 }
 
 /**