drm/amd/display: Reset apply_eamless_boot_optimization when dpms_off

[WHY&HOW]
The user closed the lid while the system was powering on and opened it
again before the “apply_seamless_boot_optimization” was set to false,
resulting in the eDP remaining blank.
Reset the “apply_seamless_boot_optimization” to false when dpms off.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Danny Wang <Danny.Wang@amd.com>
Signed-off-by: Tom Chung <chiahsuan.chung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 242bcb30dd34c6cfc753ca92e6a35bc94011318b..5bf97d8fb34a12ee8f3d6e960473a49f30670be3 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -3391,7 +3391,7 @@ static void update_seamless_boot_flags(struct dc *dc,
                int surface_count,
                struct dc_stream_state *stream)
 {
-       if (get_seamless_boot_stream_count(context) > 0 && surface_count > 0) {
+       if (get_seamless_boot_stream_count(context) > 0 && (surface_count > 0 || stream->dpms_off)) {
                /* Optimize seamless boot flag keeps clocks and watermarks high until
                 * first flip. After first flip, optimization is required to lower
                 * bandwidth. Important to note that it is expected UEFI will