unsigned long                   watermark_level;
        u32                             shp_addr, per_addr;
        enum dma_status                 status;
+       bool                            context_loaded;
        struct imx_dma_data             data;
        struct work_struct              terminate_worker;
 };
        int ret;
        unsigned long flags;
 
+       if (sdmac->context_loaded)
+               return 0;
+
        if (sdmac->direction == DMA_DEV_TO_MEM)
                load_address = sdmac->pc_from_device;
        else if (sdmac->direction == DMA_DEV_TO_DEV)
 
        spin_unlock_irqrestore(&sdma->channel_0_lock, flags);
 
+       sdmac->context_loaded = true;
+
        return ret;
 }
 
        sdmac->desc = NULL;
        spin_unlock_irqrestore(&sdmac->vc.lock, flags);
        vchan_dma_desc_free_list(&sdmac->vc, &head);
+       sdmac->context_loaded = false;
 }
 
 static int sdma_disable_channel_async(struct dma_chan *chan)