};
                };
  
 +              sham2_target: target-module@42701000 {
 +                      compatible = "ti,sysc-omap3-sham", "ti,sysc";
 +                      reg = <0x42701100 0x4>,
 +                            <0x42701110 0x4>,
 +                            <0x42701114 0x4>;
 +                      reg-names = "rev", "sysc", "syss";
 +                      ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
 +                                       SYSC_OMAP2_AUTOIDLE)>;
 +                      ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 +                                      <SYSC_IDLE_NO>,
 +                                      <SYSC_IDLE_SMART>;
 +                      ti,syss-mask = <1>;
 +                      /* Domains (P, C): l4per_pwrdm, l4sec_clkdm */
 +                      clocks = <&l4sec_clkctrl DRA7_L4SEC_SHAM2_CLKCTRL 0>;
 +                      clock-names = "fck";
 +                      #address-cells = <1>;
 +                      #size-cells = <1>;
 +                      ranges = <0x0 0x42701000 0x1000>;
 +
 +                      sham2: sham@0 {
 +                              compatible = "ti,omap5-sham";
 +                              reg = <0 0x300>;
 +                              interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
 +                              dmas = <&edma_xbar 165 0>;
 +                              dma-names = "rx";
 +                              clocks = <&l3_iclk_div>;
 +                              clock-names = "fck";
 +                      };
 +              };
 +
+               iva_hd_target: target-module@5a000000 {
+                       compatible = "ti,sysc-omap4", "ti,sysc";
+                       reg = <0x5a05a400 0x4>,
+                             <0x5a05a410 0x4>;
+                       reg-names = "rev", "sysc";
+                       ti,sysc-midle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>;
+                       power-domains = <&prm_iva>;
+                       resets = <&prm_iva 2>;
+                       reset-names = "rstctrl";
+                       clocks = <&iva_clkctrl DRA7_IVA_CLKCTRL 0>;
+                       clock-names = "fck";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0x5a000000 0x5a000000 0x1000000>,
+                                <0x5b000000 0x5b000000 0x1000000>;
+ 
+                       iva {
+                               compatible = "ti,ivahd";
+                       };
+               };
+ 
                opp_supply_mpu: opp-supply@4a003b20 {
                        compatible = "ti,omap5-opp-supply";
                        reg = <0x4a003b20 0xc>;