riscv: read the hart ID from mhartid on boot

When in M-Mode, we can use the mhartid CSR to get the ID of the running
HART. Doing so, direct M-Mode boot without firmware is possible.

Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>

diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h
index 0ab6428110280be4708960675c875420b0c60773..318192c66fd8b5ed0c2cfec4f1564c59e905feae 100644 (file)
--- a/arch/riscv/include/asm/csr.h
+++ b/arch/riscv/include/asm/csr.h
@@ -99,6 +99,7 @@
 #define CSR_MCAUSE             0x342
 #define CSR_MTVAL              0x343
 #define CSR_MIP                        0x344
+#define CSR_MHARTID            0xf14
 
 #ifdef CONFIG_RISCV_M_MODE
 # define CSR_STATUS    CSR_MSTATUS

diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
index 5cfd2c582945bc1086399c477d59e27e3cbf06d4..fc99730869466f6652007dec7db645dc36bf85da 100644 (file)
--- a/arch/riscv/kernel/head.S
+++ b/arch/riscv/kernel/head.S
@@ -50,6 +50,14 @@ _start_kernel:
        csrw CSR_IE, zero
        csrw CSR_IP, zero
 
+#ifdef CONFIG_RISCV_M_MODE
+       /*
+        * The hartid in a0 is expected later on, and we have no firmware
+        * to hand it to us.
+        */
+       csrr a0, CSR_MHARTID
+#endif
+
        /* Load the global pointer */
 .option push
 .option norelax