x86/apic: Cleanup apic_printk()s

Use the new apic_pr_*() helpers and cleanup the apic_printk() maze.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Tested-by: Breno Leitao <leitao@debian.org>
Link: https://lore.kernel.org/all/20240802155440.589821068@linutronix.de

diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 66fd4b2a37a3a59197730c2f030cb47957ec8224..1838a73b0950636d3befebf577ee1ed70446dec4 100644 (file)
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -677,7 +677,7 @@ calibrate_by_pmtimer(u32 deltapm, long *delta, long *deltatsc)
        return -1;
 #endif
 
-       apic_printk(APIC_VERBOSE, "... PM-Timer delta = %u\n", deltapm);
+       apic_pr_verbose("... PM-Timer delta = %u\n", deltapm);
 
        /* Check, if the PM timer is available */
        if (!deltapm)
@@ -687,14 +687,14 @@ calibrate_by_pmtimer(u32 deltapm, long *delta, long *deltatsc)
 
        if (deltapm > (pm_100ms - pm_thresh) &&
            deltapm < (pm_100ms + pm_thresh)) {
-               apic_printk(APIC_VERBOSE, "... PM-Timer result ok\n");
+               apic_pr_verbose("... PM-Timer result ok\n");
                return 0;
        }
 
        res = (((u64)deltapm) *  mult) >> 22;
        do_div(res, 1000000);
-       pr_warn("APIC calibration not consistent "
-               "with PM-Timer: %ldms instead of 100ms\n", (long)res);
+       pr_warn("APIC calibration not consistent with PM-Timer: %ldms instead of 100ms\n",
+               (long)res);
 
        /* Correct the lapic counter value */
        res = (((u64)(*delta)) * pm_100ms);
@@ -707,9 +707,8 @@ calibrate_by_pmtimer(u32 deltapm, long *delta, long *deltatsc)
        if (boot_cpu_has(X86_FEATURE_TSC)) {
                res = (((u64)(*deltatsc)) * pm_100ms);
                do_div(res, deltapm);
-               apic_printk(APIC_VERBOSE, "TSC delta adjusted to "
-                                         "PM-Timer: %lu (%ld)\n",
-                                       (unsigned long)res, *deltatsc);
+               apic_pr_verbose("TSC delta adjusted to PM-Timer: %lu (%ld)\n",
+                               (unsigned long)res, *deltatsc);
                *deltatsc = (long)res;
        }
 
@@ -792,8 +791,7 @@ static int __init calibrate_APIC_clock(void)
         * in the clockevent structure and return.
         */
        if (!lapic_init_clockevent()) {
-               apic_printk(APIC_VERBOSE, "lapic timer already calibrated %d\n",
-                           lapic_timer_period);
+               apic_pr_verbose("lapic timer already calibrated %d\n", lapic_timer_period);
                /*
                 * Direct calibration methods must have an always running
                 * local APIC timer, no need for broadcast timer.
@@ -802,8 +800,7 @@ static int __init calibrate_APIC_clock(void)
                return 0;
        }
 
-       apic_printk(APIC_VERBOSE, "Using local APIC timer interrupts.\n"
-                   "calibrating APIC timer ...\n");
+       apic_pr_verbose("Using local APIC timer interrupts. Calibrating APIC timer ...\n");
 
        /*
         * There are platforms w/o global clockevent devices. Instead of
@@ -866,7 +863,7 @@ static int __init calibrate_APIC_clock(void)
 
        /* Build delta t1-t2 as apic timer counts down */
        delta = lapic_cal_t1 - lapic_cal_t2;
-       apic_printk(APIC_VERBOSE, "... lapic delta = %ld\n", delta);
+       apic_pr_verbose("... lapic delta = %ld\n", delta);
 
        deltatsc = (long)(lapic_cal_tsc2 - lapic_cal_tsc1);
 
@@ -877,22 +874,19 @@ static int __init calibrate_APIC_clock(void)
        lapic_timer_period = (delta * APIC_DIVISOR) / LAPIC_CAL_LOOPS;
        lapic_init_clockevent();
 
-       apic_printk(APIC_VERBOSE, "..... delta %ld\n", delta);
-       apic_printk(APIC_VERBOSE, "..... mult: %u\n", lapic_clockevent.mult);
-       apic_printk(APIC_VERBOSE, "..... calibration result: %u\n",
-                   lapic_timer_period);
+       apic_pr_verbose("..... delta %ld\n", delta);
+       apic_pr_verbose("..... mult: %u\n", lapic_clockevent.mult);
+       apic_pr_verbose("..... calibration result: %u\n", lapic_timer_period);
 
        if (boot_cpu_has(X86_FEATURE_TSC)) {
-               apic_printk(APIC_VERBOSE, "..... CPU clock speed is "
-                           "%ld.%04ld MHz.\n",
-                           (deltatsc / LAPIC_CAL_LOOPS) / (1000000 / HZ),
-                           (deltatsc / LAPIC_CAL_LOOPS) % (1000000 / HZ));
+               apic_pr_verbose("..... CPU clock speed is %ld.%04ld MHz.\n",
+                               (deltatsc / LAPIC_CAL_LOOPS) / (1000000 / HZ),
+                               (deltatsc / LAPIC_CAL_LOOPS) % (1000000 / HZ));
        }
 
-       apic_printk(APIC_VERBOSE, "..... host bus clock speed is "
-                   "%u.%04u MHz.\n",
-                   lapic_timer_period / (1000000 / HZ),
-                   lapic_timer_period % (1000000 / HZ));
+       apic_pr_verbose("..... host bus clock speed is %u.%04u MHz.\n",
+                       lapic_timer_period / (1000000 / HZ),
+                       lapic_timer_period % (1000000 / HZ));
 
        /*
         * Do a sanity check on the APIC calibration result
@@ -911,7 +905,7 @@ static int __init calibrate_APIC_clock(void)
         * available.
         */
        if (!pm_referenced && global_clock_event) {
-               apic_printk(APIC_VERBOSE, "... verify APIC timer\n");
+               apic_pr_verbose("... verify APIC timer\n");
 
                /*
                 * Setup the apic timer manually
@@ -932,11 +926,11 @@ static int __init calibrate_APIC_clock(void)
 
                /* Jiffies delta */
                deltaj = lapic_cal_j2 - lapic_cal_j1;
-               apic_printk(APIC_VERBOSE, "... jiffies delta = %lu\n", deltaj);
+               apic_pr_verbose("... jiffies delta = %lu\n", deltaj);
 
                /* Check, if the jiffies result is consistent */
                if (deltaj >= LAPIC_CAL_LOOPS-2 && deltaj <= LAPIC_CAL_LOOPS+2)
-                       apic_printk(APIC_VERBOSE, "... jiffies result ok\n");
+                       apic_pr_verbose("... jiffies result ok\n");
                else
                        levt->features |= CLOCK_EVT_FEAT_DUMMY;
        }
@@ -1221,9 +1215,8 @@ void __init sync_Arb_IDs(void)
         */
        apic_wait_icr_idle();
 
-       apic_printk(APIC_DEBUG, "Synchronizing Arb IDs.\n");
-       apic_write(APIC_ICR, APIC_DEST_ALLINC |
-                       APIC_INT_LEVELTRIG | APIC_DM_INIT);
+       apic_pr_debug("Synchronizing Arb IDs.\n");
+       apic_write(APIC_ICR, APIC_DEST_ALLINC | APIC_INT_LEVELTRIG | APIC_DM_INIT);
 }
 
 enum apic_intr_mode_id apic_intr_mode __ro_after_init;
@@ -1409,10 +1402,10 @@ static void lapic_setup_esr(void)
        if (maxlvt > 3)
                apic_write(APIC_ESR, 0);
        value = apic_read(APIC_ESR);
-       if (value != oldvalue)
-               apic_printk(APIC_VERBOSE, "ESR value before enabling "
-                       "vector: 0x%08x  after: 0x%08x\n",
-                       oldvalue, value);
+       if (value != oldvalue) {
+               apic_pr_verbose("ESR value before enabling vector: 0x%08x  after: 0x%08x\n",
+                               oldvalue, value);
+       }
 }
 
 #define APIC_IR_REGS           APIC_ISR_NR
@@ -1599,10 +1592,10 @@ static void setup_local_APIC(void)
        value = apic_read(APIC_LVT0) & APIC_LVT_MASKED;
        if (!cpu && (pic_mode || !value || ioapic_is_disabled)) {
                value = APIC_DM_EXTINT;
-               apic_printk(APIC_VERBOSE, "enabled ExtINT on CPU#%d\n", cpu);
+               apic_pr_verbose("Enabled ExtINT on CPU#%d\n", cpu);
        } else {
                value = APIC_DM_EXTINT | APIC_LVT_MASKED;
-               apic_printk(APIC_VERBOSE, "masked ExtINT on CPU#%d\n", cpu);
+               apic_pr_verbose("Masked ExtINT on CPU#%d\n", cpu);
        }
        apic_write(APIC_LVT0, value);
 
@@ -2066,8 +2059,7 @@ static __init void apic_set_fixmap(bool read_apic)
 {
        set_fixmap_nocache(FIX_APIC_BASE, mp_lapic_addr);
        apic_mmio_base = APIC_BASE;
-       apic_printk(APIC_VERBOSE, "mapped APIC to %16lx (%16lx)\n",
-                   apic_mmio_base, mp_lapic_addr);
+       apic_pr_verbose("Mapped APIC to %16lx (%16lx)\n", apic_mmio_base, mp_lapic_addr);
        if (read_apic)
                apic_read_boot_cpu_id(false);
 }
@@ -2170,18 +2162,17 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_error_interrupt)
        apic_eoi();
        atomic_inc(&irq_err_count);
 
-       apic_printk(APIC_DEBUG, KERN_DEBUG "APIC error on CPU%d: %02x",
-                   smp_processor_id(), v);
+       apic_pr_debug("APIC error on CPU%d: %02x", smp_processor_id(), v);
 
        v &= 0xff;
        while (v) {
                if (v & 0x1)
-                       apic_printk(APIC_DEBUG, KERN_CONT " : %s", error_interrupt_reason[i]);
+                       apic_pr_debug_cont(" : %s", error_interrupt_reason[i]);
                i++;
                v >>= 1;
        }
 
-       apic_printk(APIC_DEBUG, KERN_CONT "\n");
+       apic_pr_debug_cont("\n");
 
        trace_error_apic_exit(ERROR_APIC_VECTOR);
 }
@@ -2201,8 +2192,7 @@ static void __init connect_bsp_APIC(void)
                 * PIC mode, enable APIC mode in the IMCR, i.e.  connect BSP's
                 * local APIC to INT and NMI lines.
                 */
-               apic_printk(APIC_VERBOSE, "leaving PIC mode, "
-                               "enabling APIC mode.\n");
+               apic_pr_verbose("Leaving PIC mode, enabling APIC mode.\n");
                imcr_pic_to_apic();
        }
 #endif
@@ -2227,8 +2217,7 @@ void disconnect_bsp_APIC(int virt_wire_setup)
                 * IPIs, won't work beyond this point!  The only exception are
                 * INIT IPIs.
                 */
-               apic_printk(APIC_VERBOSE, "disabling APIC mode, "
-                               "entering PIC mode.\n");
+               apic_pr_verbose("Disabling APIC mode, entering PIC mode.\n");
                imcr_apic_to_pic();
                return;
        }