drm/amd/display: For FAMS2 don't program P-State force from driver

P-State force programming is handled entirely by FW in FAMS2.  Remove
any programming from driver side to prevent incorrect programming from
driver side (which may override FW programming)

Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c b/drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c
index 846c183fe3a82ea6213df9b06bbe8ac03a7f9802..b1ebf5053b4fc3286b0d03a1d8f506caa690d195 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c
+++ b/drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c
@@ -990,7 +990,6 @@ static struct hubp_funcs dcn401_hubp_funcs = {
        .hubp_soft_reset = hubp31_soft_reset,
        .hubp_set_flip_int = hubp401_set_flip_int,
        .hubp_in_blank = hubp401_in_blank,
-       .hubp_update_force_pstate_disallow = hubp32_update_force_pstate_disallow,
        .phantom_hubp_post_enable = hubp32_phantom_hubp_post_enable,
        .hubp_update_mall_sel = hubp401_update_mall_sel,
        .hubp_prepare_subvp_buffering = hubp32_prepare_subvp_buffering,

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_init.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_init.c
index 2533f16510ba1837a07d18592f7f8af28db8e4f9..457f4167e84825c1cb1cdec8689319e10864642a 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_init.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_init.c
@@ -132,7 +132,6 @@ static const struct hwseq_private_funcs dcn401_private_funcs = {
        .dccg_init = dcn20_dccg_init,
        .set_mcm_luts = dcn401_set_mcm_luts,
        .program_mall_pipe_config = dcn32_program_mall_pipe_config,
-       .update_force_pstate = dcn32_update_force_pstate,
        .update_mall_sel = dcn32_update_mall_sel,
        .calculate_dccg_k1_k2_values = NULL,
        .apply_single_controller_ctx_to_hw = dce110_apply_single_controller_ctx_to_hw,