MIPS: Get rid of BCM1250_M3_WAR

BCM1250_M3_WAR is depending on CONFIG_CONFIG_SB1_PASS_2_WORKAROUNDS.
So using this option directly lets and remove define.

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

diff --git a/arch/mips/include/asm/mach-cavium-octeon/war.h b/arch/mips/include/asm/mach-cavium-octeon/war.h
index 0a2bf6b7af9469c844055e7ca99954b6fc01735c..616de70e697cd877da6860fb1e4f4bead07bbfcd 100644 (file)
--- a/arch/mips/include/asm/mach-cavium-octeon/war.h
+++ b/arch/mips/include/asm/mach-cavium-octeon/war.h
@@ -9,8 +9,6 @@
 #ifndef __ASM_MIPS_MACH_CAVIUM_OCTEON_WAR_H
 #define __ASM_MIPS_MACH_CAVIUM_OCTEON_WAR_H
 
-#define BCM1250_M3_WAR                 0
-
 #define CAVIUM_OCTEON_DCACHE_PREFETCH_WAR      \
        OCTEON_IS_MODEL(OCTEON_CN6XXX)
 

diff --git a/arch/mips/include/asm/mach-generic/war.h b/arch/mips/include/asm/mach-generic/war.h
index 6b7de91435e3e932d983ee8ddab6cbd34736a9e7..94796ad7e7ded0d8fcebe8120ae080f24201a936 100644 (file)
--- a/arch/mips/include/asm/mach-generic/war.h
+++ b/arch/mips/include/asm/mach-generic/war.h
@@ -8,6 +8,4 @@
 #ifndef __ASM_MACH_GENERIC_WAR_H
 #define __ASM_MACH_GENERIC_WAR_H
 
-#define BCM1250_M3_WAR                 0
-
 #endif /* __ASM_MACH_GENERIC_WAR_H */

diff --git a/arch/mips/include/asm/mach-ip22/war.h b/arch/mips/include/asm/mach-ip22/war.h
index 70de6a5008d33b5bb4c87f0168c6121ca2eaf83e..12cf05dd46d3068d37ef5e346ec2fb88883ec79d 100644 (file)
--- a/arch/mips/include/asm/mach-ip22/war.h
+++ b/arch/mips/include/asm/mach-ip22/war.h
@@ -8,6 +8,4 @@
 #ifndef __ASM_MIPS_MACH_IP22_WAR_H
 #define __ASM_MIPS_MACH_IP22_WAR_H
 
-#define BCM1250_M3_WAR                 0
-
 #endif /* __ASM_MIPS_MACH_IP22_WAR_H */

diff --git a/arch/mips/include/asm/mach-ip27/war.h b/arch/mips/include/asm/mach-ip27/war.h
index 5b01e8fe245fee3121f2f858d354c0400ef22804..0852fe64594d737e82217466ff5cddf8c71cc6cb 100644 (file)
--- a/arch/mips/include/asm/mach-ip27/war.h
+++ b/arch/mips/include/asm/mach-ip27/war.h
@@ -8,6 +8,4 @@
 #ifndef __ASM_MIPS_MACH_IP27_WAR_H
 #define __ASM_MIPS_MACH_IP27_WAR_H
 
-#define BCM1250_M3_WAR                 0
-
 #endif /* __ASM_MIPS_MACH_IP27_WAR_H */

diff --git a/arch/mips/include/asm/mach-ip28/war.h b/arch/mips/include/asm/mach-ip28/war.h
index ba4267e2d34d5e452979b2402ea507980d364536..32796925700ae965d81756881810c93edabd4f00 100644 (file)
--- a/arch/mips/include/asm/mach-ip28/war.h
+++ b/arch/mips/include/asm/mach-ip28/war.h
@@ -8,6 +8,4 @@
 #ifndef __ASM_MIPS_MACH_IP28_WAR_H
 #define __ASM_MIPS_MACH_IP28_WAR_H
 
-#define BCM1250_M3_WAR                 0
-
 #endif /* __ASM_MIPS_MACH_IP28_WAR_H */

diff --git a/arch/mips/include/asm/mach-ip30/war.h b/arch/mips/include/asm/mach-ip30/war.h
index f404e22b7798c3ec7d301734831070c85cb4e22e..ea77545f512832ab0266a3ebbfdb929a2a9bd98d 100644 (file)
--- a/arch/mips/include/asm/mach-ip30/war.h
+++ b/arch/mips/include/asm/mach-ip30/war.h
@@ -5,6 +5,4 @@
 #ifndef __ASM_MIPS_MACH_IP30_WAR_H
 #define __ASM_MIPS_MACH_IP30_WAR_H
 
-#define BCM1250_M3_WAR                 0
-
 #endif /* __ASM_MIPS_MACH_IP30_WAR_H */

diff --git a/arch/mips/include/asm/mach-ip32/war.h b/arch/mips/include/asm/mach-ip32/war.h
index 01475db746ec9343317baec6d3553e4e8df8fc9d..3e81408795b404be6934855f87072d9af15fbbc1 100644 (file)
--- a/arch/mips/include/asm/mach-ip32/war.h
+++ b/arch/mips/include/asm/mach-ip32/war.h
@@ -8,6 +8,4 @@
 #ifndef __ASM_MIPS_MACH_IP32_WAR_H
 #define __ASM_MIPS_MACH_IP32_WAR_H
 
-#define BCM1250_M3_WAR                 0
-
 #endif /* __ASM_MIPS_MACH_IP32_WAR_H */

diff --git a/arch/mips/include/asm/mach-malta/war.h b/arch/mips/include/asm/mach-malta/war.h
index 68b204ff59a6326873d526bba50aba9825c84dc7..0f5401c0e888e4a37e4c2149bc3788597ddb8ff5 100644 (file)
--- a/arch/mips/include/asm/mach-malta/war.h
+++ b/arch/mips/include/asm/mach-malta/war.h
@@ -8,6 +8,4 @@
 #ifndef __ASM_MIPS_MACH_MIPS_WAR_H
 #define __ASM_MIPS_MACH_MIPS_WAR_H
 
-#define BCM1250_M3_WAR                 0
-
 #endif /* __ASM_MIPS_MACH_MIPS_WAR_H */

diff --git a/arch/mips/include/asm/mach-rc32434/war.h b/arch/mips/include/asm/mach-rc32434/war.h
index 68b204ff59a6326873d526bba50aba9825c84dc7..0f5401c0e888e4a37e4c2149bc3788597ddb8ff5 100644 (file)
--- a/arch/mips/include/asm/mach-rc32434/war.h
+++ b/arch/mips/include/asm/mach-rc32434/war.h
@@ -8,6 +8,4 @@
 #ifndef __ASM_MIPS_MACH_MIPS_WAR_H
 #define __ASM_MIPS_MACH_MIPS_WAR_H
 
-#define BCM1250_M3_WAR                 0
-
 #endif /* __ASM_MIPS_MACH_MIPS_WAR_H */

diff --git a/arch/mips/include/asm/mach-rm/war.h b/arch/mips/include/asm/mach-rm/war.h
index 093a3894ae41fe31706e896672e053e733e35515..723c9de79ea14b91451382b9666764a5d21f1352 100644 (file)
--- a/arch/mips/include/asm/mach-rm/war.h
+++ b/arch/mips/include/asm/mach-rm/war.h
@@ -8,6 +8,4 @@
 #ifndef __ASM_MIPS_MACH_RM_WAR_H
 #define __ASM_MIPS_MACH_RM_WAR_H
 
-#define BCM1250_M3_WAR                 0
-
 #endif /* __ASM_MIPS_MACH_RM_WAR_H */

diff --git a/arch/mips/include/asm/mach-sibyte/war.h b/arch/mips/include/asm/mach-sibyte/war.h
index 71eff5bc3f535417cf635deb97182df38b650944..157eca1be328efc5a2437b081271fa221909d8ab 100644 (file)
--- a/arch/mips/include/asm/mach-sibyte/war.h
+++ b/arch/mips/include/asm/mach-sibyte/war.h
@@ -8,18 +8,4 @@
 #ifndef __ASM_MIPS_MACH_SIBYTE_WAR_H
 #define __ASM_MIPS_MACH_SIBYTE_WAR_H
 
-#if defined(CONFIG_SB1_PASS_2_WORKAROUNDS)
-
-#ifndef __ASSEMBLY__
-extern int sb1250_m3_workaround_needed(void);
-#endif
-
-#define BCM1250_M3_WAR sb1250_m3_workaround_needed()
-
-#else
-
-#define BCM1250_M3_WAR 0
-
-#endif
-
 #endif /* __ASM_MIPS_MACH_SIBYTE_WAR_H */

diff --git a/arch/mips/include/asm/mach-tx49xx/war.h b/arch/mips/include/asm/mach-tx49xx/war.h
index 0dc2beb5bf5a816bc369fffc8d108f4826f5aab2..edf50e2bbb349e6b345d8c13312254ad47bc86b3 100644 (file)
--- a/arch/mips/include/asm/mach-tx49xx/war.h
+++ b/arch/mips/include/asm/mach-tx49xx/war.h
@@ -8,6 +8,4 @@
 #ifndef __ASM_MIPS_MACH_TX49XX_WAR_H
 #define __ASM_MIPS_MACH_TX49XX_WAR_H
 
-#define BCM1250_M3_WAR                 0
-
 #endif /* __ASM_MIPS_MACH_TX49XX_WAR_H */

diff --git a/arch/mips/include/asm/war.h b/arch/mips/include/asm/war.h
index 2ce5cd61a072a49758508a215e61ce477a5896eb..c20c04855089934f794569568c358330f692f3c5 100644 (file)
--- a/arch/mips/include/asm/war.h
+++ b/arch/mips/include/asm/war.h
@@ -72,18 +72,4 @@
 #define DADDI_WAR 0
 #endif
 
-/*
- * Workaround for the Sibyte M3 errata the text of which can be found at
- *
- *   http://sibyte.broadcom.com/hw/bcm1250/docs/pass2errata.txt
- *
- * This will enable the use of a special TLB refill handler which does a
- * consistency check on the information in c0_badvaddr and c0_entryhi and
- * will just return and take the exception again if the information was
- * found to be inconsistent.
- */
-#ifndef BCM1250_M3_WAR
-#error Check setting of BCM1250_M3_WAR for your platform
-#endif
-
 #endif /* _ASM_WAR_H */

diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index e931eb06af5791f963ed5c904cbc10e9400a92a8..a7521b8f765862d32be631bfce69e3a0ce639623 100644 (file)
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -83,9 +83,13 @@ static inline int r4k_250MHZhwbug(void)
        return 0;
 }
 
+extern int sb1250_m3_workaround_needed(void);
+
 static inline int __maybe_unused bcm1250_m3_war(void)
 {
-       return BCM1250_M3_WAR;
+       if (IS_ENABLED(CONFIG_SB1_PASS_2_WORKAROUNDS))
+               return sb1250_m3_workaround_needed();
+       return 0;
 }
 
 static inline int __maybe_unused r10000_llsc_war(void)