]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
clk: renesas: r8a779h0: Add PWM clock
authorCong Dang <cong.dang.xn@renesas.com>
Thu, 25 Jul 2024 19:49:08 +0000 (21:49 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Fri, 2 Aug 2024 09:23:04 +0000 (11:23 +0200)
Add the module clock used by the PWM timers on the Renesas R-Car V4M
(R8A779H0) SoC.

Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
[wsa: rebased]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240725194906.14644-9-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r8a779h0-cpg-mssr.c

index e03118bf42ac8a8671f8db43603a64b9ea44c134..ef707dce840090eeacfd8a7c03baead3b35caa5a 100644 (file)
@@ -196,6 +196,7 @@ static const struct mssr_mod_clk r8a779h0_mod_clks[] __initconst = {
        DEF_MOD("msi4",         622,    R8A779H0_CLK_MSO),
        DEF_MOD("msi5",         623,    R8A779H0_CLK_MSO),
        DEF_MOD("pcie0",        624,    R8A779H0_CLK_S0D2_HSC),
+       DEF_MOD("pwm",          628,    R8A779H0_CLK_SASYNCPERD4),
        DEF_MOD("rpc-if",       629,    R8A779H0_CLK_RPCD2),
        DEF_MOD("scif0",        702,    R8A779H0_CLK_SASYNCPERD4),
        DEF_MOD("scif1",        703,    R8A779H0_CLK_SASYNCPERD4),