if (gr->func->init_tex_hww_esr)
                                gr->func->init_tex_hww_esr(gr, gpc, tpc);
                        nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000);
+                       if (gr->func->init_504430)
+                               gr->func->init_504430(gr, gpc, tpc);
                        nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x644), 0x001ffffe);
                        nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x64c), 0x0000000f);
                }
 
        void (*init_419c9c)(struct gf100_gr *);
        void (*init_ppc_exceptions)(struct gf100_gr *);
        void (*init_tex_hww_esr)(struct gf100_gr *, int gpc, int tpc);
+       void (*init_504430)(struct gf100_gr *, int gpc, int tpc);
        void (*set_hww_esr_report_mask)(struct gf100_gr *);
        const struct gf100_gr_pack *mmio;
        struct {
 
 void gk110_gr_init_419eb4(struct gf100_gr *);
 
+void gm107_gr_init_504430(struct gf100_gr *, int, int);
+
 int gk20a_gr_init(struct gf100_gr *);
 
 int gm200_gr_rops(struct gf100_gr *);
 
  * PGRAPH engine/subdev functions
  ******************************************************************************/
 
+void
+gm107_gr_init_504430(struct gf100_gr *gr, int gpc, int tpc)
+{
+       struct nvkm_device *device = gr->base.engine.subdev.device;
+       nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x430), 0xc0000000);
+}
+
 static void
 gm107_gr_init_bios_2(struct gf100_gr *gr)
 {
                        nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x50c), 0xffffffff);
                        gr->func->init_tex_hww_esr(gr, gpc, tpc);
                        nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000);
-                       nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x430), 0xc0000000);
+                       gr->func->init_504430(gr, gpc, tpc);
                        nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x644), 0x00dffffe);
                        nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x64c), 0x00000005);
                }
        .init_419cc0 = gf100_gr_init_419cc0,
        .init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
        .init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
+       .init_504430 = gm107_gr_init_504430,
        .mmio = gm107_gr_pack_mmio,
        .fecs.ucode = &gm107_gr_fecs_ucode,
        .gpccs.ucode = &gm107_gr_gpccs_ucode,
 
                        nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x50c), 0xffffffff);
                        gr->func->init_tex_hww_esr(gr, gpc, tpc);
                        nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000);
-                       nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x430), 0xc0000000);
+                       gr->func->init_504430(gr, gpc, tpc);
                        nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x644), 0x00dffffe);
                        nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x64c), 0x00000005);
                }
        .init_419cc0 = gf100_gr_init_419cc0,
        .init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
        .init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
+       .init_504430 = gm107_gr_init_504430,
        .rops = gm200_gr_rops,
        .ppc_nr = 2,
        .grctx = &gm200_grctx,
 
                        nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x50c), 0xffffffff);
                        gr->func->init_tex_hww_esr(gr, gpc, tpc);
                        nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x084), 0xc0000000);
-                       nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x430), 0xc0000000);
+                       gr->func->init_504430(gr, gpc, gpc);
                        nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x644), 0x00dffffe);
                        nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x64c), 0x00000105);
                }
        .init_419c9c = gp100_gr_init_419c9c,
        .init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
        .init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
+       .init_504430 = gm107_gr_init_504430,
        .rops = gm200_gr_rops,
        .ppc_nr = 2,
        .grctx = &gp100_grctx,
 
        .init_419cc0 = gf100_gr_init_419cc0,
        .init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
        .init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
+       .init_504430 = gm107_gr_init_504430,
        .rops = gm200_gr_rops,
        .ppc_nr = 3,
        .grctx = &gp102_grctx,
 
        .init_419cc0 = gf100_gr_init_419cc0,
        .init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
        .init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
+       .init_504430 = gm107_gr_init_504430,
        .rops = gm200_gr_rops,
        .ppc_nr = 1,
        .grctx = &gp107_grctx,
 
        .init_419cc0 = gf100_gr_init_419cc0,
        .init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
        .init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
+       .init_504430 = gm107_gr_init_504430,
        .rops = gm200_gr_rops,
        .ppc_nr = 1,
        .grctx = &gp102_grctx,