Printing error messages does not work because "cu" is eating all
output.
-* iminfo:
-
- Print timestamp information, too.
-
-* NEW:
-
- Set system clock.
-
* saveenv:
Can we create a ld script which automagically takes care about
Modifications for 0.9.0:
======================================================================
+* Added optional random BOOTP delay
+ (Patch by Hannes Fertala, 13 Apr 2001)
+
+* Update for ETX094 board: add hardware ID detection; misc. config
+ changes
+ (Patch by Hannes Fertala, 13 Apr 2001)
+
+* Added support for date/time (print image timestamps; read/write
+ Real-Time Clock); supported RTC's: MPC8xx internal, Philips PCF8563
+
* Added generic interface for board dependend spacial command
extensions.
CFG_CMD_ECHO * echo arguments
CFG_CMD_I2C * I2C serial bus support
CFG_CMD_REGINFO * Register dump
- -------------------------
+ CFG_CMD_IMMAP * IMMR dump support
+ CFG_CMD_DATE * support for RTC, date/time...
+ CFG_CMD_BSP * Board SPecific functions
+ -----------------------------------------------
CFG_CMD_ALL all
CFG_CMD_DFL Default configuration; at the moment
SIU Watchdog feature is enabled in the SYPCR
register.
+- Real-Time Clock:
+
+ When CFG_CMD_DATE is selected, the type of the RTC
+ has to be selected, too. Define exactly one of the
+ following options:
+
+ CONFIG_RTC_MPC8xx - use internal RTC of MPC8xx
+ CONFIG_RTC_PCF8563 - use Philips PCF8563 RTC
+
- Partition Support:
CONFIG_MAC_PARTITION and/or CONFIG_DOS_PARTITION
must configure support for at least one partition
type as well.
+- BOOTP Recovery Mode:
+ CONFIG_BOOTP_RANDOM_DELAY
+
+ If you have many targets in a network that try to
+ boot using BOOTP, you may want to avoid that all
+ systems send out BOOTP requests at precisely the same
+ moment (which would happen for instance at recovery
+ from a power failure, when all systems will try to
+ boot, thus flooding the BOOTP server. Defining
+ CONFIG_BOOTP_RANDOM_DELAY causes a random delay to be
+ inserted before sending out BOOTP requests. The
+ following delays are insterted then:
+
+ 1st BOOTP request: delay 0 ... 1 sec
+ 2nd BOOTP request: delay 0 ... 2 sec
+ 3rd BOOTP request: delay 0 ... 4 sec
+ 4th and following
+ BOOTP requests: delay 0 ... 8 sec
+
Configuration Settings:
-----------------------
/* ------------------------------------------------------------------------- */
static long int dram_size (long int, long int *, long int);
+static void read_hw_vers (void);
/* ------------------------------------------------------------------------- */
if (!s || strncmp(s, "ETX_", 4)) {
printf ("### No HW ID - assuming ETX_094\n");
+ read_hw_vers ();
return (1);
}
}
putc ('\n');
+ read_hw_vers ();
+
return (1);
}
*/
memctl->memc_mptpr = CFG_MPTPR_1BK_4K;
+ /* A3(SDRAM)=0 => Bursttype = Sequential
+ * A2-A0(SDRAM)=010 => Burst length = 4
+ * A4-A6(SDRAM)=010 => CasLat=2
+ */
memctl->memc_mar = 0x00000088;
/*
/* perform SDRAM initializsation sequence */
- memctl->memc_mcr = 0x80004128; /* Init Part 1*/
- memctl->memc_mcr = 0x80004734; /* Init Part 2*/
+ memctl->memc_mcr = 0x80004128; /* SDRAM bank 0 - Init Part 1 */
+ memctl->memc_mcr = 0x80004734; /* SDRAM bank 0 - Init Part 2 */
udelay(1);
if (board_type == 0) { /* "L" type boards have only one bank SDRAM */
- memctl->memc_mcr = 0x80006105; /* SDRAM bank 1 */
- udelay(1);
- memctl->memc_mcr = 0x80006230; /* SDRAM bank 1 - execute twice */
+ memctl->memc_mcr = 0x80006128; /* SDRAM bank 1 - Init Part 1 */
+ memctl->memc_mcr = 0x80006734; /* SDRAM bank 1 - Init Part 2 */
udelay(1);
}
}
/* NOTREACHED */
}
+
+/* ------------------------------------------------------------------------- */
+
+/* HW-ID Table (Bits: 2^9;2^7;2^5) */
+#define HW_ID_0 0x0000
+#define HW_ID_1 0x0020
+#define HW_ID_2 0x0080
+#define HW_ID_3 0x00a0
+#define HW_ID_4 0x0200
+#define HW_ID_5 0x0220
+#define HW_ID_6 0x0280
+#define HW_ID_7 0x02a0
+
+void read_hw_vers ()
+{
+ unsigned short rd_msk = 0x02A0;
+
+ /* HW-ID pin-definition */
+ volatile immap_t *immr = (immap_t *) CFG_IMMR;
+
+ immr->im_ioport.iop_pddir &= ~(rd_msk);
+ immr->im_ioport.iop_pdpar &= ~(rd_msk);
+
+ /* debug printf(" State of PD: %x\n",immr->im_ioport.iop_pddat); */
+
+ /* Check the HW-ID */
+ printf (" HW-Version: ");
+ switch (immr->im_ioport.iop_pddat & rd_msk) {
+ case HW_ID_0:
+ printf ("V0.1 - V0.3 / W97238-Q3162-A1-1-2\n");
+ break;
+ case HW_ID_1:
+ printf ("V0.9 / W50037-Q1-D6-1\n");
+ break;
+ case HW_ID_2:
+ printf ("NOT USED - assuming ID#2\n");
+ break;
+ case HW_ID_3:
+ printf ("NOT USED - assuming ID#3\n");
+ break;
+ case HW_ID_4:
+ printf ("NOT USED - assuming ID#4\n");
+ break;
+ case HW_ID_5:
+ printf ("NOT USED - assuming ID#5\n");
+ break;
+ case HW_ID_6:
+ printf ("NOT USED - assuming ID#6\n");
+ break;
+ case HW_ID_7:
+ printf ("NOT USED - assuming ID#7\n");
+ break;
+ default:
+ printf ("###Error###\n");
+ break;
+ }
+}
+
+/* ------------------------------------------------------------------------- */
#include <commproc.h>
#include <i2c.h>
#include <command.h>
+#include <cmd_bsp.h>
/* ------------------------------------------------------------------------- */
/*-----------------------------------------------------------------------
* Board Special Commands: PIC read/write
*/
+#if (CONFIG_COMMANDS & CFG_CMD_BSP)
void do_pic (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
{
printf ("Usage:\n%s\n", cmdtp->usage);
}
+#endif /* CFG_CMD_BSP */
/*-----------------------------------------------------------------------
* Test: Enable Ethernet
#if 0 /* XXX - Just what was this for??? email etheisen@mindspring.com */
plprcr |= ((speed + refclock / 2) / refclock - 1) << 20;
#endif
+ immr->im_clkrstk.cark_plprcrk = KAPWR_KEY;
immr->im_clkrst.car_plprcr = plprcr;
/*
#include <image.h>
#include <malloc.h>
#include <zlib.h>
+#if (CONFIG_COMMANDS & CFG_CMD_DATE)
+#include <rtc.h>
+#endif
int gunzip (void *, int, unsigned char *, int *);
void
print_image_hdr (image_header_t *hdr)
{
-/* time_t timestamp = (time_t)hdr->ih_time; */
+#if (CONFIG_COMMANDS & CFG_CMD_DATE)
+ time_t timestamp = (time_t)hdr->ih_time;
+ struct rtc_time tm;
+#endif
printf (" Image Name: %.*s\n", IH_NMLEN, hdr->ih_name);
-/* printf (" Created: %s", ctime(×tamp)); */
+#if (CONFIG_COMMANDS & CFG_CMD_DATE)
+ to_tm (timestamp, &tm);
+ printf (" Created: %4d-%02d-%02d %2d:%02d:%02d\n",
+ tm.tm_year, tm.tm_mon, tm.tm_mday,
+ tm.tm_hour, tm.tm_min, tm.tm_sec);
+#endif /* CFG_CMD_DATE */
printf (" Image Type: "); print_type(hdr); printf ("\n");
printf (" Data Size: %d Bytes = %d kB = %d MB\n",
hdr->ih_size, hdr->ih_size>>10, hdr->ih_size>>20);
#define CONFIG_PHY_ADDR 0 /* PHY address */
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_IRQ | CFG_CMD_ASKENV)
+#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_IRQ | CFG_CMD_ASKENV) \
& ~CFG_CMD_NET)
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
#endif
+#undef CONFIG_FLASH_16BIT
+#undef CONFIG_BOOTP_RANDOM_DELAY
+
#undef CONFIG_BOOTARGS
#define CONFIG_RAMBOOTCOMMAND \
"bootp; " \
#ifdef DEBUG
#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#else
-#define CFG_MONITOR_LEN (128 << 10) /* Reserve 128 kB for Monitor */
+#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#endif
#define CFG_MONITOR_BASE CFG_FLASH_BASE
#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
#define CFG_REMAP_OR_AM 0x80000000 /* OR addr mask */
#define CFG_PRELIM_OR_AM 0xE0000000 /* OR addr mask */
-/* FLASH timing: ACS = 11, TRLX = 0, CSNT = 1, SCY = 5, EHTR = 1 */
+/* FLASH timing: ACS = 11, TRLX = 1, CSNT = 0, SCY = 2, EHTR = 0 */
#define CFG_OR_TIMING_FLASH (OR_ACS_DIV2 | OR_BI | \
OR_SCY_2_CLK | OR_TRLX )
#define CFG_OR0_REMAP (CFG_REMAP_OR_AM | CFG_OR_TIMING_FLASH)
#define CFG_OR0_PRELIM (CFG_PRELIM_OR_AM | CFG_OR_TIMING_FLASH)
-#define CFG_BR0_PRELIM ((FLASH_BASE0_PRELIM & BR_BA_MSK) | BR_V )
+
+#ifdef CONFIG_FLASH_16BIT /* 16 bit data port */
+#define CFG_BR0_PRELIM ((FLASH_BASE0_PRELIM & BR_BA_MSK) | BR_V | BR_PS_16)
+#define CFG_BR1_PRELIM ((FLASH_BASE1_PRELIM & BR_BA_MSK) | BR_V | BR_PS_16)
+#else /* 32 bit data port */
+#define CFG_BR0_PRELIM ((FLASH_BASE0_PRELIM & BR_BA_MSK) | BR_V | BR_PS_32)
+#define CFG_BR1_PRELIM ((FLASH_BASE1_PRELIM & BR_BA_MSK) | BR_V | BR_PS_32)
+#endif /* CONFIG_FLASH_16BIT */
#define CFG_OR1_REMAP CFG_OR0_REMAP
#define CFG_OR1_PRELIM CFG_OR0_PRELIM
-#define CFG_BR1_PRELIM ((FLASH_BASE1_PRELIM & BR_BA_MSK) | BR_V )
/*
* BR2/3 and OR2/3 (SDRAM)
/* 8 column SDRAM */
#define CFG_MAMR_8COL ((CFG_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \
MAMR_AMA_TYPE_0 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A11 | \
- MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
+ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_1X)
/* 9 column SDRAM */
#define CFG_MAMR_9COL ((CFG_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
- MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
+ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_1X)
/*
#undef CONFIG_WATCHDOG /* watchdog disabled */
+#define CONFIG_STATUS_LED 1 /* Status LED enabled */
+
#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+#define CONFIG_MAC_PARTITION
+#define CONFIG_DOS_PARTITION
+
+#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
+
+#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_IDE | CFG_CMD_DATE)
+
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
*/
#define CFG_SDRAM_BASE 0x00000000
#define CFG_FLASH_BASE 0x40000000
-#if defined(DEBUG) || (CONFIG_COMMANDS & CFG_CMD_IDE)
+#if defined(DEBUG)
#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#else
-#define CFG_MONITOR_LEN (128 << 10) /* Reserve 128 kB for Monitor */
+#define CFG_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */
#endif
#define CFG_MONITOR_BASE CFG_FLASH_BASE
#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
#undef CONFIG_WATCHDOG /* watchdog disabled */
-//#define CONFIG_STATUS_LED 1 /* Status LED enabled */
+#define CONFIG_STATUS_LED 1 /* Status LED enabled */
#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL & ~CFG_CMD_CACHE)
+#define CONFIG_MAC_PARTITION
+#define CONFIG_DOS_PARTITION
+
+#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
+
+#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_IDE | CFG_CMD_DATE)
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
*/
#define CFG_SDRAM_BASE 0x00000000
#define CFG_FLASH_BASE 0x40000000
-#if defined(DEBUG) || (CONFIG_COMMANDS & CFG_CMD_IDE)
+#if defined(DEBUG)
#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#else
-#define CFG_MONITOR_LEN (128 << 10) /* Reserve 128 kB for Monitor */
+#define CFG_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */
#endif
#define CFG_MONITOR_BASE CFG_FLASH_BASE
#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
#define CFG_PCMCIA_IO_ADDR (0xEC000000)
#define CFG_PCMCIA_IO_SIZE ( 64 << 20 )
+/*-----------------------------------------------------------------------
+ * IDE/ATA stuff (Supports IDE harddisk on PCMCIA Adapter)
+ *-----------------------------------------------------------------------
+ */
+
+#define CONFIG_IDE_PCCARD 1 /* Use IDE with PC Card Adapter */
+
+#undef CONFIG_IDE_PCMCIA /* Direct IDE not supported */
+#undef CONFIG_IDE_LED /* LED for ide not supported */
+#undef CONFIG_IDE_RESET /* reset for ide not supported */
+
+#define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */
+#define CFG_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */
+
+#define CFG_ATA_IDE0_OFFSET 0x0000
+
+#define CFG_ATA_BASE_ADDR CFG_PCMCIA_MEM_ADDR
+
+/* Offset for data I/O */
+#define CFG_ATA_DATA_OFFSET (CFG_PCMCIA_MEM_SIZE + 0x320)
+
+/* Offset for normal register accesses */
+#define CFG_ATA_REG_OFFSET (2 * CFG_PCMCIA_MEM_SIZE + 0x320)
+
+/* Offset for alternate registers */
+#define CFG_ATA_ALT_OFFSET 0x0100
+
+
/*-----------------------------------------------------------------------
*
*-----------------------------------------------------------------------
#undef CONFIG_WATCHDOG /* watchdog disabled */
+#define CONFIG_STATUS_LED 1 /* Status LED enabled */
+
#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+#define CONFIG_MAC_PARTITION
+#define CONFIG_DOS_PARTITION
+
+#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
+
+#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_IDE | CFG_CMD_DATE)
+
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
*/
#define CFG_SDRAM_BASE 0x00000000
#define CFG_FLASH_BASE 0x40000000
-#if defined(DEBUG) || (CONFIG_COMMANDS & CFG_CMD_IDE)
+#if defined(DEBUG)
#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#else
-#define CFG_MONITOR_LEN (128 << 10) /* Reserve 128 kB for Monitor */
+#define CFG_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */
#endif
#define CFG_MONITOR_BASE CFG_FLASH_BASE
#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
#define CFG_PCMCIA_IO_ADDR (0xEC000000)
#define CFG_PCMCIA_IO_SIZE ( 64 << 20 )
+/*-----------------------------------------------------------------------
+ * IDE/ATA stuff (Supports IDE harddisk on PCMCIA Adapter)
+ *-----------------------------------------------------------------------
+ */
+
+#define CONFIG_IDE_PCCARD 1 /* Use IDE with PC Card Adapter */
+
+#undef CONFIG_IDE_PCMCIA /* Direct IDE not supported */
+#undef CONFIG_IDE_LED /* LED for ide not supported */
+#undef CONFIG_IDE_RESET /* reset for ide not supported */
+
+#define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */
+#define CFG_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */
+
+#define CFG_ATA_IDE0_OFFSET 0x0000
+
+#define CFG_ATA_BASE_ADDR CFG_PCMCIA_MEM_ADDR
+
+/* Offset for data I/O */
+#define CFG_ATA_DATA_OFFSET (CFG_PCMCIA_MEM_SIZE + 0x320)
+
+/* Offset for normal register accesses */
+#define CFG_ATA_REG_OFFSET (2 * CFG_PCMCIA_MEM_SIZE + 0x320)
+
+/* Offset for alternate registers */
+#define CFG_ATA_ALT_OFFSET 0x0100
+
+
/*-----------------------------------------------------------------------
*
*-----------------------------------------------------------------------
#undef CONFIG_WATCHDOG /* watchdog disabled */
+#define CONFIG_STATUS_LED 1 /* Status LED enabled */
+
#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL & ~CFG_CMD_CACHE)
+#define CONFIG_MAC_PARTITION
+#define CONFIG_DOS_PARTITION
+
+#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
+
+#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_IDE | CFG_CMD_DATE)
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
*/
#define CFG_SDRAM_BASE 0x00000000
#define CFG_FLASH_BASE 0x40000000
-#if defined(DEBUG) || (CONFIG_COMMANDS & CFG_CMD_IDE)
+#if defined(DEBUG)
#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#else
-#define CFG_MONITOR_LEN (128 << 10) /* Reserve 128 kB for Monitor */
+#define CFG_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */
#endif
#define CFG_MONITOR_BASE CFG_FLASH_BASE
#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
/* page write mode using last */
/* 4 bits of the address */
+#define CONFIG_RTC_PCF8563 /* use Philips PCF8563 RTC */
+
#ifdef CONFIG_8xx_CONS_SCC2 /* Can't use ethernet, then */
#define CONFIG_COMMANDS ((CONFIG_CMD_DFL & ~CFG_CMD_NET) | \
CFG_CMD_EEPROM | \
( (CFG_PLPRCR_MF << PLPRCR_MF_SHIFT) | \
PLPRCR_SPLSS | PLPRCR_TEXPS | PLPRCR_TMIST | \
/*PLPRCR_CSRC|*/ PLPRCR_LPM_NORMAL | \
- PLPRCR_CSR | PLPRCR_LOLRE /*|PLPRCR_FIOPD*/ \
+ PLPRCR_CSR /*| PLPRCR_LOLRE|PLPRCR_FIOPD*/ \
)
#define CONFIG_8xx_GCLK_FREQ ((CFG_PLPRCR_MF+1)*13200000)
ulong BootpID;
int BootpTry;
+#ifdef CONFIG_BOOTP_RANDOM_DELAY
+ulong seed1, seed2;
+#endif
static int BootpExtended (u8 *e);
case 3: /* Gateways list */
if (NetOurGatewayIP == 0) {
memcpy(&NetOurGatewayIP, ext+2, 4);
- }
+ }
break;
case 4: /* Time server - Not yet supported */
break;
print_IPaddr (NetOurSubnetMask);
putc('\n');
}
-
+
if (NetOurGatewaysIP[0]) {
puts ("NetOurGatewaysIP : ");
print_IPaddr (NetOurGatewaysIP[0]);
putc('\n');
}
-
+
if (NetBootFileSize) {
printf("NetBootFileSize : %d\n", NetBootFileSize);
}
-
+
if (NetOurHostName[0]) {
printf("NetOurHostName : %s\n", NetOurHostName);
}
-
+
if (NetOurRootPath[0]) {
printf("NetOurRootPath : %s\n", NetOurRootPath);
}
-
+
if (NetOurNISDomain[0]) {
printf("NetOurNISDomain : %s\n", NetOurNISDomain);
}
/* Retrieve extended informations (we must parse the vendor area) */
if ((*(uint *)bp->bp_vend) == BOOTP_VENDOR_MAGIC)
BootpVendorProcess(&bp->bp_vend[4], len);
-
+
NetSetTimeout(0, (thand_f *)0);
#ifdef DEBUG
static int BootpExtended (u8 *e)
{
u8 *start = e ;
-
+
*e++ = 99; /* RFC1048 Magic Cookie */
*e++ = 130;
*e++ = 83;
#endif
*e++ = 255; /* End of the list */
-
+
return e - start ;
}
Bootp_t *bp;
int ext_len;
+#ifdef CONFIG_BOOTP_RANDOM_DELAY /* Random BOOTP delay */
+ bd_t *bis;
+ int reg;
+ char *e,*s;
+ uchar tmp[64];
+ ulong tst1, tst2, m_value, m_mask, sum;
+
+ if (BootpTry ==0) {
+ /* get our mac */
+ reg = getenv_r ("ethaddr", tmp, sizeof(tmp));
+ s = (reg > 0) ? tmp : NULL;
+
+ for (reg=0; reg<6; ++reg) {
+ bis->bi_enetaddr[reg] = s ? simple_strtoul(s, &e, 16) : 0;
+ if (s) {
+ s = (*e) ? e+1 : e;
+ }
+ }
+#ifdef DEBUG
+ printf("BootpRequest => Our Mac: ");
+ for (reg=0; reg<6; reg++) {
+ printf ("%x%c",
+ bis->bi_enetaddr[reg],
+ reg==5 ? '\n' : ':');
+ }
+#endif /* DEBUG */
+
+ /* Mac-Manipulation 2 get seed1 */
+ tst1=0;
+ tst2=0;
+ for (reg=2; reg<6; reg++) {
+ tst1 = tst1 << 8;
+ tst1 = tst1 | bis->bi_enetaddr[reg];
+ }
+ for (reg=0; reg<2; reg++) {
+ tst2 = tst2 | bis->bi_enetaddr[reg];
+ tst2 = tst2 << 8;
+ }
+
+ seed1 = tst1^tst2;
+
+ /* Mirror seed1*/
+ m_mask=0x1;
+ for (reg=1;reg<=32;reg++) {
+ m_value |= (m_mask & seed1);
+ seed1 = seed1 >> 1;
+ m_value = m_value << 1;
+ }
+ seed1 = m_value;
+ seed2 = 0xB78D0945;
+ }
+
+ /* Random Number Generator */
+
+ for (reg=0;reg<=0;reg++) {
+ sum = seed1 + seed2;
+ if (sum < seed1 || sum < seed2)
+ sum++;
+ seed2 = seed1;
+ seed1 = sum;
+
+ if (BootpTry<=2) { /* Start with max 1024 * 1ms */
+ sum = sum >> (22-BootpTry);
+ } else { /*After 3rd BOOTP request max 8192 * 1ms */
+ sum = sum >> 19;
+ }
+
+ printf ("Random delay: %d ms...\n", sum);
+ for (reg=0; reg <sum; reg++) {
+ udelay(1000); /*Wait 1ms*/
+ }
+#endif /* CONFIG_BOOTP_RANDOM_DELAY */
+
printf("BOOTP broadcast %d\n", ++BootpTry);
pkt = NetTxPacket;
memset ((void*)pkt, 0, PKTSIZE);
extern ulong BootpID; /* ID of cur BOOTP request */
extern char BootFile[128]; /* Boot file name */
extern int BootpTry;
+#ifdef CONFIG_BOOTP_RANDOM_DELAY
+ulong seed1, seed2; /* seed for random BOOTP delay */
+#endif
+
/* Send a BOOTP request */
extern void BootpRequest (void);
LIB = librtc.a
-OBJS = date.o pcf8563.o
+OBJS = date.o pcf8563.o mpc8xx.o
all: $(LIB)
--- /dev/null
+/*
+ * (C) Copyright 2001
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * Date & Time support for internal RTC of MPC8xx
+ */
+
+/*#define DEBUG*/
+
+#include <ppcboot.h>
+#include <command.h>
+#include <rtc.h>
+
+#if defined(CONFIG_RTC_MPC8xx) && (CONFIG_COMMANDS & CFG_CMD_DATE)
+
+/* ------------------------------------------------------------------------- */
+
+void rtc_get (struct rtc_time *tmp)
+{
+ volatile immap_t *immr = (immap_t *)CFG_IMMR;
+ ulong tim;
+
+ tim = immr->im_sit.sit_rtc;
+
+ to_tm (tim, tmp);
+
+ debug ( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
+ tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
+ tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
+}
+
+void rtc_set (struct rtc_time *tmp)
+{
+ volatile immap_t *immr = (immap_t *)CFG_IMMR;
+ ulong tim;
+
+ debug ( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
+ tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
+ tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
+
+ tim = mktime (tmp->tm_year, tmp->tm_mon, tmp->tm_mday,
+ tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
+
+ immr->im_sitk.sitk_rtck = KAPWR_KEY;
+ immr->im_sit.sit_rtc = tim;
+}
+
+void rtc_reset (void)
+{
+ return; /* nothing to do */
+}
+
+/* ------------------------------------------------------------------------- */
+
+#endif /* CONFIG_RTC_MPC8xx && CFG_CMD_DATE */
#include <rtc.h>
#include <i2c.h>
-#if (CONFIG_COMMANDS & CFG_CMD_DATE)
+#if defined(CONFIG_RTC_PCF8563) && (CONFIG_COMMANDS & CFG_CMD_DATE)
static uchar rtc_read (uchar reg);
static void rtc_write (uchar reg, uchar val);
return (((n / 10) << 4) | (n % 10));
}
-#endif /* CFG_CMD_DATE */
+#endif /* CONFIG_RTC_PCF8563 && CFG_CMD_DATE */
projects / users / rw / ppcboot.git / commitdiff