arm64: ssbs: Fix context-switch when SSBS is present on all CPUs

commit fca3d33d8ad61eb53eca3ee4cac476d1e31b9008 upstream.

When all CPUs in the system implement the SSBS extension, the SSBS field
in PSTATE is the definitive indication of the mitigation state. Further,
when the CPUs implement the SSBS manipulation instructions (advertised
to userspace via an HWCAP), EL0 can toggle the SSBS field directly and
so we cannot rely on any shadow state such as TIF_SSBD at all.

Avoid forcing the SSBS field in context-switch on such a system, and
simply rely on the PSTATE register instead.

Cc: <stable@vger.kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Srinivas Ramana <sramana@codeaurora.org>
Fixes: cbdf8a189a66 ("arm64: Force SSBS on context switch")
Reviewed-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c
index d54586d5b031f874e7fa70814cd618ac3c16ceca..fab013c5ee8c916cc0b213e87a466e4cdd8fe538 100644 (file)
--- a/arch/arm64/kernel/process.c
+++ b/arch/arm64/kernel/process.c
@@ -466,6 +466,13 @@ static void ssbs_thread_switch(struct task_struct *next)
        if (unlikely(next->flags & PF_KTHREAD))
                return;
 
+       /*
+        * If all CPUs implement the SSBS extension, then we just need to
+        * context-switch the PSTATE field.
+        */
+       if (cpu_have_feature(cpu_feature(SSBS)))
+               return;
+
        /* If the mitigation is enabled, then we leave SSBS clear. */
        if ((arm64_get_ssbd_state() == ARM64_SSBD_FORCE_ENABLE) ||
            test_tsk_thread_flag(next, TIF_SSBD))