Add support to decode memory controller data on Nehalem

xeon75xx code can be dropped as it doesn't exist anyway on
mcelog. According to the code there, it lacks support for it
to work at the Kernel.

Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>

diff --git a/mce-intel-nehalem.c b/mce-intel-nehalem.c
index f49eb7253faa7df7848be589d441b67670c64a2a..ad4ce69a2890147d3cab7248e356152836e81056 100644 (file)
--- a/mce-intel-nehalem.c
+++ b/mce-intel-nehalem.c
@@ -112,6 +112,7 @@ void nehalem_decode_model(struct mce_event *e)
        uint64_t status = e->status;
        uint32_t mca = status & 0xffff;
        uint64_t misc = e->misc;
+       unsigned channel, dimm;
 
        if ((mca >> 11) == 1) {         /* bus and interconnect QPI */
                decode_bitfield(e, status, qpi_status);
@@ -128,6 +129,13 @@ void nehalem_decode_model(struct mce_event *e)
                if (status & MCI_STATUS_MISCV)
                        decode_numfield(e, misc, nhm_memory_misc_numbers);
        }
+
+       if ((((status & 0xffff) >> 7) == 1) && (status & MCI_STATUS_MISCV)) {
+               channel = EXTRACT(e->misc, 18, 19);
+               dimm = EXTRACT(e->misc, 16, 17);
+               mce_snprintf(e->mc_location, "channel=%d, dimm=%d",
+                            channel, dimm);
+       }
 }
 
 /* Only core errors supported. Same as Nehalem */
@@ -139,18 +147,4 @@ void xeon75xx_decode_model(struct mce_event *e)
                decode_bitfield(e, status, internal_error_status);
                decode_numfield(e, status, internal_error_numbers);
        }
-#if 0
-       xeon75xx_decode_dimm(m, msize);
-#endif
-}
-
-#if 0
-/* Nehalem-EP specific DIMM decoding */
-void nehalem_memerr_misc(struct mce *m, int *channel, int *dimm)
-{
-       if (m->status & MCI_STATUS_MISCV) {
-               *channel = EXTRACT(m->misc, 18, 19);
-               *dimm = EXTRACT(m->misc, 16, 17);
-       }
 }
-#endif
\ No newline at end of file

diff --git a/mce-intel.c b/mce-intel.c
index 9146e24896f809c86a20b2d522d50a4142a04785..427b98e407147bf7116372e70fb5f6744b40b4bf 100644 (file)
--- a/mce-intel.c
+++ b/mce-intel.c
@@ -345,6 +345,14 @@ int parse_intel_event(struct ras_events *ras, struct mce_event *e)
        decode_mcg(e);
        decode_mci(e, &ismemerr);
 
+       /* Check if the error is at the memory controller */
+       if (((e->status & 0xffff) >> 7) == 1) {
+               unsigned corr_err_cnt;
+
+               corr_err_cnt = EXTRACT(e->status, 38, 52);
+               mce_snprintf(e->mc_location, "n_errors=%d", corr_err_cnt);
+       }
+
        if (test_prefix(11, (e->status & 0xffffL))) {
                switch(mce->cputype) {
                case CPU_P6OLD: