]> www.infradead.org Git - users/dwmw2/linux.git/commitdiff
ARM: dts: at91: sama5d2: fix CAN message ram offset and size
authorNicolas Ferre <nicolas.ferre@microchip.com>
Thu, 3 Dec 2020 09:19:49 +0000 (10:19 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Tue, 29 Dec 2020 12:47:08 +0000 (13:47 +0100)
commit 85b8350ae99d1300eb6dc072459246c2649a8e50 upstream.

CAN0 and CAN1 instances share the same message ram configured
at 0x210000 on sama5d2 Linux systems.
According to current configuration of CAN0, we need 0x1c00 bytes
so that the CAN1 don't overlap its message ram:
64 x RX FIFO0 elements => 64 x 72 bytes
32 x TXE (TX Event FIFO) elements => 32 x 8 bytes
32 x TXB (TX Buffer) elements => 32 x 72 bytes
So a total of 7168 bytes (0x1C00).

Fix offset to match this needed size.
Make the CAN0 message ram ioremap match exactly this size so that is
easily understandable.  Adapt CAN1 size accordingly.

Fixes: bc6d5d7666b7 ("ARM: dts: at91: sama5d2: add m_can nodes")
Reported-by: Dan Sneddon <dan.sneddon@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Tested-by: Cristian Birsan <cristian.birsan@microchip.com>
Cc: stable@vger.kernel.org # v4.13+
Link: https://lore.kernel.org/r/20201203091949.9015-1-nicolas.ferre@microchip.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/arm/boot/dts/sama5d2.dtsi

index 8a09c2eab0f979e5ba573828ff739600fade0237..d6e3f975323dc14378f196ea215df128c4caf46c 100644 (file)
 
                        can0: can@f8054000 {
                                compatible = "bosch,m_can";
-                               reg = <0xf8054000 0x4000>, <0x210000 0x4000>;
+                               reg = <0xf8054000 0x4000>, <0x210000 0x1c00>;
                                reg-names = "m_can", "message_ram";
                                interrupts = <56 IRQ_TYPE_LEVEL_HIGH 7>,
                                             <64 IRQ_TYPE_LEVEL_HIGH 7>;
 
                        can1: can@fc050000 {
                                compatible = "bosch,m_can";
-                               reg = <0xfc050000 0x4000>, <0x210000 0x4000>;
+                               reg = <0xfc050000 0x4000>, <0x210000 0x3800>;
                                reg-names = "m_can", "message_ram";
                                interrupts = <57 IRQ_TYPE_LEVEL_HIGH 7>,
                                             <65 IRQ_TYPE_LEVEL_HIGH 7>;
                                assigned-clocks = <&can1_gclk>;
                                assigned-clock-parents = <&utmi>;
                                assigned-clock-rates = <40000000>;
-                               bosch,mram-cfg = <0x1100 0 0 64 0 0 32 32>;
+                               bosch,mram-cfg = <0x1c00 0 0 64 0 0 32 32>;
                                status = "disabled";
                        };