]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
wifi: rtw89: pci: fix interrupt enable mask for HALT C2H of RTL8851B
authorZong-Zhe Yang <kevin_yang@realtek.com>
Mon, 8 May 2023 08:43:33 +0000 (16:43 +0800)
committerKalle Valo <kvalo@kernel.org>
Thu, 11 May 2023 13:19:50 +0000 (16:19 +0300)
RTL8851B keeps almost the same interrupt flow as RTL8852A and RTL8852B.
But, it uses a different bitmask for interrupt indicator of FW HALT C2H.
So, we make a chip judgement in pci when configuring interrupt mask.

Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20230508084335.42953-2-pkshih@realtek.com
drivers/net/wireless/realtek/rtw89/pci.c
drivers/net/wireless/realtek/rtw89/pci.h

index b53f346fef979af01b1b2e9f534f83c48e242799..92bfef942d3a93e44af4f2c30c253d664467ad9e 100644 (file)
@@ -3216,11 +3216,16 @@ static void rtw89_pci_clear_resource(struct rtw89_dev *rtwdev,
 void rtw89_pci_config_intr_mask(struct rtw89_dev *rtwdev)
 {
        struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv;
+       const struct rtw89_chip_info *chip = rtwdev->chip;
+       u32 hs0isr_ind_int_en = B_AX_HS0ISR_IND_INT_EN;
+
+       if (chip->chip_id == RTL8851B)
+               hs0isr_ind_int_en = B_AX_HS0ISR_IND_INT_EN_WKARND;
 
        rtwpci->halt_c2h_intrs = B_AX_HALT_C2H_INT_EN | 0;
 
        if (rtwpci->under_recovery) {
-               rtwpci->intrs[0] = B_AX_HS0ISR_IND_INT_EN;
+               rtwpci->intrs[0] = hs0isr_ind_int_en;
                rtwpci->intrs[1] = 0;
        } else {
                rtwpci->intrs[0] = B_AX_TXDMA_STUCK_INT_EN |
@@ -3230,7 +3235,7 @@ void rtw89_pci_config_intr_mask(struct rtw89_dev *rtwdev)
                                   B_AX_RXDMA_STUCK_INT_EN |
                                   B_AX_RDU_INT_EN |
                                   B_AX_RPQBD_FULL_INT_EN |
-                                  B_AX_HS0ISR_IND_INT_EN;
+                                  hs0isr_ind_int_en;
 
                rtwpci->intrs[1] = B_AX_HC10ISR_IND_INT_EN;
        }
index 0e4bd210b100fdd87b3a3197612647226976f6c3..2f3d1ad3b0f7d0b7b75657bc215110c434adabe0 100644 (file)
 #define B_AX_HD1ISR_IND_INT_EN         BIT(26)
 #define B_AX_HD0ISR_IND_INT_EN         BIT(25)
 #define B_AX_HS0ISR_IND_INT_EN         BIT(24)
+#define B_AX_HS0ISR_IND_INT_EN_WKARND  BIT(23)
 #define B_AX_RETRAIN_INT_EN            BIT(21)
 #define B_AX_RPQBD_FULL_INT_EN         BIT(20)
 #define B_AX_RDU_INT_EN                        BIT(19)