phy: qcom-qmp-combo: rework regs layout arrays

Use symbolic names for the values inside reg layout arrays. New register
names are added following the PCS register layout that is used by the
particular PHY.

Note: ipq8074 tables appear to use a mixture of v2 and v3 registers.
This might need additional fixes.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230113212102.421491-2-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
index ee35bcd2bdb581b8071eba0eeb7698118ad1b8e8..1f022e580407fc1c93cbbcadef1fbdb1fc01786c 100644 (file)
--- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
@@ -102,23 +102,23 @@ enum qphy_reg_layout {
 };
 
 static const unsigned int qmp_v3_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
-       [QPHY_SW_RESET]                 = 0x00,
-       [QPHY_START_CTRL]               = 0x08,
-       [QPHY_PCS_STATUS]               = 0x174,
-       [QPHY_PCS_POWER_DOWN_CONTROL]   = 0x04,
-       [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = 0x0d8,
-       [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR]  = 0x0dc,
+       [QPHY_SW_RESET]                 = QPHY_V3_PCS_SW_RESET,
+       [QPHY_START_CTRL]               = QPHY_V3_PCS_START_CONTROL,
+       [QPHY_PCS_STATUS]               = QPHY_V3_PCS_PCS_STATUS,
+       [QPHY_PCS_POWER_DOWN_CONTROL]   = QPHY_V3_PCS_POWER_DOWN_CONTROL,
+       [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = QPHY_V3_PCS_AUTONOMOUS_MODE_CTRL,
+       [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V3_PCS_LFPS_RXTERM_IRQ_CLEAR,
 };
 
 static const unsigned int qmp_v4_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
-       [QPHY_SW_RESET]                 = 0x00,
-       [QPHY_START_CTRL]               = 0x44,
-       [QPHY_PCS_STATUS]               = 0x14,
-       [QPHY_PCS_POWER_DOWN_CONTROL]   = 0x40,
+       [QPHY_SW_RESET]                 = QPHY_V4_PCS_SW_RESET,
+       [QPHY_START_CTRL]               = QPHY_V4_PCS_START_CONTROL,
+       [QPHY_PCS_STATUS]               = QPHY_V4_PCS_PCS_STATUS1,
+       [QPHY_PCS_POWER_DOWN_CONTROL]   = QPHY_V4_PCS_POWER_DOWN_CONTROL,
 
        /* In PCS_USB */
-       [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = 0x008,
-       [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = 0x014,
+       [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = QPHY_V4_PCS_USB3_AUTONOMOUS_MODE_CTRL,
+       [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = QPHY_V4_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR,
 };
 
 static const struct qmp_phy_init_tbl qmp_v3_usb3_serdes_tbl[] = {