drm/amd/display: Send IPSExit unconditionally.

[Why&How]
PMFW needs to flush page cache in IPSExit.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: JinZe Xu <JinZe.Xu@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
index ca6da53f45adb88ef7affdaee23523b0219352a4..a3fbb9f5b4a6e111c0a9b2cbc9995bf3d4ac85b7 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
+++ b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
@@ -1365,14 +1365,15 @@ static void dc_dmub_srv_exit_low_power_state(const struct dc *dc)
                        if (!dc->debug.optimize_ips_handshake || !ips_fw->signals.bits.ips2_commit)
                                udelay(dc->debug.ips2_eval_delay_us);
 
-                       if (ips_fw->signals.bits.ips2_commit) {
-                               DC_LOG_IPS(
-                                       "exit IPS2 #1 (ips1_commit=%u ips2_commit=%u)",
-                                       ips_fw->signals.bits.ips1_commit,
-                                       ips_fw->signals.bits.ips2_commit);
+                       DC_LOG_IPS(
+                               "exit IPS2 #1 (ips1_commit=%u ips2_commit=%u)",
+                               ips_fw->signals.bits.ips1_commit,
+                               ips_fw->signals.bits.ips2_commit);
 
-                               // Tell PMFW to exit low power state
-                               dc->clk_mgr->funcs->exit_low_power_state(dc->clk_mgr);
+                       // Tell PMFW to exit low power state
+                       dc->clk_mgr->funcs->exit_low_power_state(dc->clk_mgr);
+
+                       if (ips_fw->signals.bits.ips2_commit) {
 
                                DC_LOG_IPS(
                                        "wait IPS2 entry delay (ips1_commit=%u ips2_commit=%u)",