parisc/unaligned: Fix ldw() and stw() unalignment handlers

Fix 3 bugs:

a) emulate_stw() doesn't return the error code value, so faulting
instructions are not reported and aborted.

b) Tell emulate_ldw() to handle fldw_l as floating point instruction

c) Tell emulate_ldw() to handle ldw_m as integer instruction

Signed-off-by: Helge Deller <deller@gmx.de>
Cc: stable@vger.kernel.org

diff --git a/arch/parisc/kernel/unaligned.c b/arch/parisc/kernel/unaligned.c
index a238b7fe8908bb97176b0fa4321f7407451c4f19..286cec4d86d7b0165a7b81ffcfdc48512a568acf 100644 (file)
--- a/arch/parisc/kernel/unaligned.c
+++ b/arch/parisc/kernel/unaligned.c
@@ -340,7 +340,7 @@ static int emulate_stw(struct pt_regs *regs, int frreg, int flop)
        : "r" (val), "r" (regs->ior), "r" (regs->isr)
        : "r19", "r20", "r21", "r22", "r1", FIXUP_BRANCH_CLOBBER );
 
-       return 0;
+       return ret;
 }
 static int emulate_std(struct pt_regs *regs, int frreg, int flop)
 {
@@ -619,10 +619,10 @@ void handle_unaligned(struct pt_regs *regs)
        {
        case OPCODE_FLDW_L:
                flop=1;
-               ret = emulate_ldw(regs, R2(regs->iir),0);
+               ret = emulate_ldw(regs, R2(regs->iir), 1);
                break;
        case OPCODE_LDW_M:
-               ret = emulate_ldw(regs, R2(regs->iir),1);
+               ret = emulate_ldw(regs, R2(regs->iir), 0);
                break;
 
        case OPCODE_FSTW_L: