net: eth: altera: Change access ports to mdio for all xMII applications

Change use of Altera TSE's MDIO access from phy 0 registers to phy 1
registers. This allows support for GMII, MII, RGMII, and SGMII
designs where the external PHY is always accesible through
Altera TSE's MDIO phy 1 registers and Altera's PCS is accessible
through MDIO phy 0 registers for SGMII applications.

Signed-off-by: Vince Bridgers <vbridger@opensource.altera.com>
Tested-by: Kai Lin Ng <kailng@altera.com>
Tested-by: Dalon Westergreen <dwesterg@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/altera/altera_tse_main.c b/drivers/net/ethernet/altera/altera_tse_main.c
index 760c72c6e2acd50ba8472e4b4dd77170c2c381d6..4773d98927cf5fc6fc88b0b2f523f2c28c552cb7 100644 (file)
--- a/drivers/net/ethernet/altera/altera_tse_main.c
+++ b/drivers/net/ethernet/altera/altera_tse_main.c
@@ -105,11 +105,11 @@ static int altera_tse_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
 
        /* set MDIO address */
        csrwr32((mii_id & 0x1f), priv->mac_dev,
-               tse_csroffs(mdio_phy0_addr));
+               tse_csroffs(mdio_phy1_addr));
 
        /* get the data */
        return csrrd32(priv->mac_dev,
-                      tse_csroffs(mdio_phy0) + regnum * 4) & 0xffff;
+                      tse_csroffs(mdio_phy1) + regnum * 4) & 0xffff;
 }
 
 static int altera_tse_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
@@ -120,10 +120,10 @@ static int altera_tse_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
 
        /* set MDIO address */
        csrwr32((mii_id & 0x1f), priv->mac_dev,
-               tse_csroffs(mdio_phy0_addr));
+               tse_csroffs(mdio_phy1_addr));
 
        /* write the data */
-       csrwr32(value, priv->mac_dev, tse_csroffs(mdio_phy0) + regnum * 4);
+       csrwr32(value, priv->mac_dev, tse_csroffs(mdio_phy1) + regnum * 4);
        return 0;
 }