]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
media: cadence: csi2rx: Configure DPHY using link freq
authorPratyush Yadav <p.yadav@ti.com>
Mon, 9 Oct 2023 13:09:32 +0000 (18:39 +0530)
committerHans Verkuil <hverkuil-cisco@xs4all.nl>
Thu, 12 Oct 2023 07:22:28 +0000 (09:22 +0200)
Some platforms like TI's J721E can have the CSI2RX paired with an
external DPHY. Use the generic PHY framework to configure the DPHY with
the correct link frequency.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Tested-by: Julien Massot <julien.massot@collabora.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Reviewed-by: Maxime Ripard <mripard@kernel.org>
Co-developed-by: Jai Luthra <j-luthra@ti.com>
Signed-off-by: Jai Luthra <j-luthra@ti.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
drivers/media/platform/cadence/cdns-csi2rx.c

index f9b41451f4a4de933e378263f83cb157d3d61ea0..77e2413c345aa99f9b7ee7d26e0cb50bdbff5e95 100644 (file)
@@ -145,8 +145,32 @@ static void csi2rx_reset(struct csi2rx_priv *csi2rx)
 static int csi2rx_configure_ext_dphy(struct csi2rx_priv *csi2rx)
 {
        union phy_configure_opts opts = { };
+       struct phy_configure_opts_mipi_dphy *cfg = &opts.mipi_dphy;
+       struct v4l2_subdev_format sd_fmt = {
+               .which  = V4L2_SUBDEV_FORMAT_ACTIVE,
+               .pad    = CSI2RX_PAD_SINK,
+       };
+       const struct csi2rx_fmt *fmt;
+       s64 link_freq;
        int ret;
 
+       ret = v4l2_subdev_call_state_active(&csi2rx->subdev, pad, get_fmt,
+                                           &sd_fmt);
+       if (ret < 0)
+               return ret;
+
+       fmt = csi2rx_get_fmt_by_code(sd_fmt.format.code);
+
+       link_freq = v4l2_get_link_freq(csi2rx->source_subdev->ctrl_handler,
+                                      fmt->bpp, 2 * csi2rx->num_lanes);
+       if (link_freq < 0)
+               return link_freq;
+
+       ret = phy_mipi_dphy_get_default_config_for_hsclk(link_freq,
+                                                        csi2rx->num_lanes, cfg);
+       if (ret)
+               return ret;
+
        ret = phy_power_on(csi2rx->dphy);
        if (ret)
                return ret;