#define SWRM_DP_BLOCK_CTRL2_BANK(n, m) (0x1130 + 0x100 * (n - 1) + 0x40 * m)
 #define SWRM_DP_PORT_HCTRL_BANK(n, m)  (0x1134 + 0x100 * (n - 1) + 0x40 * m)
 #define SWRM_DP_BLOCK_CTRL3_BANK(n, m) (0x1138 + 0x100 * (n - 1) + 0x40 * m)
+#define SWRM_DP_SAMPLECTRL2_BANK(n, m) (0x113C + 0x100 * (n - 1) + 0x40 * m)
 #define SWRM_DIN_DPn_PCM_PORT_CTRL(n)  (0x1054 + 0x100 * (n - 1))
 #define SWR_MSTR_MAX_REG_ADDR          (0x1740)
 
 };
 
 struct qcom_swrm_port_config {
-       u8 si;
+       u16 si;
        u8 off1;
        u8 off2;
        u8 bp_mode;
 
        value = pcfg->off1 << SWRM_DP_PORT_CTRL_OFFSET1_SHFT;
        value |= pcfg->off2 << SWRM_DP_PORT_CTRL_OFFSET2_SHFT;
-       value |= pcfg->si;
+       value |= pcfg->si & 0xff;
 
        ret = ctrl->reg_write(ctrl, reg, value);
        if (ret)
                goto err;
 
+       if (pcfg->si > 0xff) {
+               value = (pcfg->si >> 8) & 0xff;
+               reg = SWRM_DP_SAMPLECTRL2_BANK(params->port_num, bank);
+               ret = ctrl->reg_write(ctrl, reg, value);
+               if (ret)
+                       goto err;
+       }
+
        if (pcfg->lane_control != SWR_INVALID_PARAM) {
                reg = SWRM_DP_PORT_CTRL_2_BANK(params->port_num, bank);
                value = pcfg->lane_control;
        struct device_node *np = ctrl->dev->of_node;
        u8 off1[QCOM_SDW_MAX_PORTS];
        u8 off2[QCOM_SDW_MAX_PORTS];
-       u8 si[QCOM_SDW_MAX_PORTS];
+       u16 si[QCOM_SDW_MAX_PORTS];
        u8 bp_mode[QCOM_SDW_MAX_PORTS] = { 0, };
        u8 hstart[QCOM_SDW_MAX_PORTS];
        u8 hstop[QCOM_SDW_MAX_PORTS];
        u8 blk_group_count[QCOM_SDW_MAX_PORTS];
        u8 lane_control[QCOM_SDW_MAX_PORTS];
        int i, ret, nports, val;
+       bool si_16 = false;
 
        ctrl->reg_read(ctrl, SWRM_COMP_PARAMS, &val);
 
                return ret;
 
        ret = of_property_read_u8_array(np, "qcom,ports-sinterval-low",
-                                       si, nports);
-       if (ret)
-               return ret;
+                                       (u8 *)si, nports);
+       if (ret) {
+               ret = of_property_read_u16_array(np, "qcom,ports-sinterval",
+                                                si, nports);
+               if (ret)
+                       return ret;
+               si_16 = true;
+       }
 
        ret = of_property_read_u8_array(np, "qcom,ports-block-pack-mode",
                                        bp_mode, nports);
 
        for (i = 0; i < nports; i++) {
                /* Valid port number range is from 1-14 */
-               ctrl->pconfig[i + 1].si = si[i];
+               if (si_16)
+                       ctrl->pconfig[i + 1].si = si[i];
+               else
+                       ctrl->pconfig[i + 1].si = ((u8 *)si)[i];
                ctrl->pconfig[i + 1].off1 = off1[i];
                ctrl->pconfig[i + 1].off2 = off2[i];
                ctrl->pconfig[i + 1].bp_mode = bp_mode[i];