.info = k10temp_info,
 };
 
-static void k10temp_get_ccd_support(struct pci_dev *pdev,
-                                   struct k10temp_data *data, int limit)
+static void k10temp_get_ccd_support(struct k10temp_data *data, int limit)
 {
        u32 regval;
        int i;
                case 0x11:      /* Zen APU */
                case 0x18:      /* Zen+ APU */
                        data->ccd_offset = 0x154;
-                       k10temp_get_ccd_support(pdev, data, 4);
+                       k10temp_get_ccd_support(data, 4);
                        break;
                case 0x31:      /* Zen2 Threadripper */
                case 0x60:      /* Renoir */
                case 0x68:      /* Lucienne */
                case 0x71:      /* Zen2 */
                        data->ccd_offset = 0x154;
-                       k10temp_get_ccd_support(pdev, data, 8);
+                       k10temp_get_ccd_support(data, 8);
                        break;
                case 0xa0 ... 0xaf:
                        data->ccd_offset = 0x300;
-                       k10temp_get_ccd_support(pdev, data, 8);
+                       k10temp_get_ccd_support(data, 8);
                        break;
                }
        } else if (boot_cpu_data.x86 == 0x19) {
                case 0x21:              /* Zen3 Ryzen Desktop */
                case 0x50 ... 0x5f:     /* Green Sardine */
                        data->ccd_offset = 0x154;
-                       k10temp_get_ccd_support(pdev, data, 8);
+                       k10temp_get_ccd_support(data, 8);
                        break;
                case 0x40 ... 0x4f:     /* Yellow Carp */
                        data->ccd_offset = 0x300;
-                       k10temp_get_ccd_support(pdev, data, 8);
+                       k10temp_get_ccd_support(data, 8);
                        break;
                case 0x60 ... 0x6f:
                case 0x70 ... 0x7f:
                        data->ccd_offset = 0x308;
-                       k10temp_get_ccd_support(pdev, data, 8);
+                       k10temp_get_ccd_support(data, 8);
                        break;
                case 0x10 ... 0x1f:
                case 0xa0 ... 0xaf:
                        data->ccd_offset = 0x300;
-                       k10temp_get_ccd_support(pdev, data, 12);
+                       k10temp_get_ccd_support(data, 12);
                        break;
                }
        } else if (boot_cpu_data.x86 == 0x1a) {