25000baseCR_Full);
                copper_seen++;
                break;
+       case IONIC_XCVR_PID_QSFP_50G_CR2_FC:
+       case IONIC_XCVR_PID_QSFP_50G_CR2:
+               ethtool_link_ksettings_add_link_mode(ks, supported,
+                                                    50000baseCR2_Full);
+               copper_seen++;
+               break;
+       case IONIC_XCVR_PID_QSFP_200G_CR4:
+               ethtool_link_ksettings_add_link_mode(ks, supported, 200000baseCR4_Full);
+               copper_seen++;
+               break;
+       case IONIC_XCVR_PID_QSFP_400G_CR4:
+               ethtool_link_ksettings_add_link_mode(ks, supported, 400000baseCR4_Full);
+               copper_seen++;
+               break;
        case IONIC_XCVR_PID_SFP_10GBASE_AOC:
        case IONIC_XCVR_PID_SFP_10GBASE_CU:
                ethtool_link_ksettings_add_link_mode(ks, supported,
                ethtool_link_ksettings_add_link_mode(ks, supported,
                                                     25000baseSR_Full);
                break;
+       case IONIC_XCVR_PID_QSFP_200G_AOC:
+       case IONIC_XCVR_PID_QSFP_200G_SR4:
+               ethtool_link_ksettings_add_link_mode(ks, supported,
+                                                    200000baseSR4_Full);
+               break;
+       case IONIC_XCVR_PID_QSFP_200G_FR4:
+               ethtool_link_ksettings_add_link_mode(ks, supported,
+                                                    200000baseLR4_ER4_FR4_Full);
+               break;
+       case IONIC_XCVR_PID_QSFP_200G_DR4:
+               ethtool_link_ksettings_add_link_mode(ks, supported,
+                                                    200000baseDR4_Full);
+               break;
+       case IONIC_XCVR_PID_QSFP_400G_FR4:
+               ethtool_link_ksettings_add_link_mode(ks, supported,
+                                                    400000baseLR4_ER4_FR4_Full);
+               break;
+       case IONIC_XCVR_PID_QSFP_400G_DR4:
+               ethtool_link_ksettings_add_link_mode(ks, supported,
+                                                    400000baseDR4_Full);
+               break;
+       case IONIC_XCVR_PID_QSFP_400G_SR4:
+               ethtool_link_ksettings_add_link_mode(ks, supported,
+                                                    400000baseSR4_Full);
+               break;
        case IONIC_XCVR_PID_SFP_10GBASE_SR:
                ethtool_link_ksettings_add_link_mode(ks, supported,
                                                     10000baseSR_Full);
 
        IONIC_XCVR_PID_SFP_25GBASE_CR_S  = 3,
        IONIC_XCVR_PID_SFP_25GBASE_CR_L  = 4,
        IONIC_XCVR_PID_SFP_25GBASE_CR_N  = 5,
-
+       IONIC_XCVR_PID_QSFP_50G_CR2_FC   = 6,
+       IONIC_XCVR_PID_QSFP_50G_CR2      = 7,
+       IONIC_XCVR_PID_QSFP_200G_CR4     = 8,
+       IONIC_XCVR_PID_QSFP_400G_CR4     = 9,
        /* Fiber */
        IONIC_XCVR_PID_QSFP_100G_AOC    = 50,
        IONIC_XCVR_PID_QSFP_100G_ACC    = 51,
        IONIC_XCVR_PID_SFP_25GBASE_ACC  = 71,
        IONIC_XCVR_PID_SFP_10GBASE_T    = 72,
        IONIC_XCVR_PID_SFP_1000BASE_T   = 73,
+       IONIC_XCVR_PID_QSFP_200G_AOC    = 74,
+       IONIC_XCVR_PID_QSFP_200G_FR4    = 75,
+       IONIC_XCVR_PID_QSFP_200G_DR4    = 76,
+       IONIC_XCVR_PID_QSFP_200G_SR4    = 77,
+       IONIC_XCVR_PID_QSFP_200G_ACC    = 78,
+       IONIC_XCVR_PID_QSFP_400G_FR4    = 79,
+       IONIC_XCVR_PID_QSFP_400G_DR4    = 80,
+       IONIC_XCVR_PID_QSFP_400G_SR4    = 81,
+       IONIC_XCVR_PID_QSFP_400G_VR4    = 82,
 };
 
 /**
  */
 union ionic_port_config {
        struct {
+#define IONIC_SPEED_400G       400000  /* 400G in Mbps */
+#define IONIC_SPEED_200G       200000  /* 200G in Mbps */
 #define IONIC_SPEED_100G       100000  /* 100G in Mbps */
 #define IONIC_SPEED_50G                50000   /* 50G in Mbps */
 #define IONIC_SPEED_40G                40000   /* 40G in Mbps */