sh: Avoid using IRQ0 on SH3 and SH4

IRQ0 is no longer returned by platform_get_irq() and its ilk -- they now
return -EINVAL instead.  However, the kernel code supporting SH3/4-based
SoCs still maps the IRQ #s starting at 0 -- modify that code to start the
IRQ #s from 16 instead.

The patch should mostly affect the AP-SH4A-3A/AP-SH4AD-0A boards as they
indeed are using IRQ0 for the SMSC911x compatible Ethernet chip.

Fixes: ce753ad1549c ("platform: finally disallow IRQ0 in platform_get_irq() and its ilk")
Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
Tested-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
Link: https://lore.kernel.org/r/71105dbf-cdb0-72e1-f9eb-eeda8e321696@omp.ru
Signed-off-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>

diff --git a/arch/sh/include/mach-common/mach/highlander.h b/arch/sh/include/mach-common/mach/highlander.h
index fb44c299d0337e3f454470829aa2874dbcb76e72..b12c79558422534936006cd7e187ffda31c932fa 100644 (file)
--- a/arch/sh/include/mach-common/mach/highlander.h
+++ b/arch/sh/include/mach-common/mach/highlander.h
@@ -176,7 +176,7 @@
 #define IVDR_CK_ON     4               /* iVDR Clock ON */
 #endif
 
-#define HL_FPGA_IRQ_BASE       200
+#define HL_FPGA_IRQ_BASE       (200 + 16)
 #define HL_NR_IRL              15
 
 #define IRQ_AX88796            (HL_FPGA_IRQ_BASE + 0)

diff --git a/arch/sh/include/mach-common/mach/r2d.h b/arch/sh/include/mach-common/mach/r2d.h
index 0d7e483c7d3f5348b9cbf979ae91e248ddf427a4..69bc1907c5637071cc5baae5a6adead1ab12a9f7 100644 (file)
--- a/arch/sh/include/mach-common/mach/r2d.h
+++ b/arch/sh/include/mach-common/mach/r2d.h
@@ -47,7 +47,7 @@
 
 #define IRLCNTR1       (PA_BCR + 0)    /* Interrupt Control Register1 */
 
-#define R2D_FPGA_IRQ_BASE      100
+#define R2D_FPGA_IRQ_BASE      (100 + 16)
 
 #define IRQ_VOYAGER            (R2D_FPGA_IRQ_BASE + 0)
 #define IRQ_EXT                        (R2D_FPGA_IRQ_BASE + 1)

diff --git a/arch/sh/include/mach-dreamcast/mach/sysasic.h b/arch/sh/include/mach-dreamcast/mach/sysasic.h
index ed69ce7f20301241831117de187dbd40d37641f1..3b27be9a527ea071dbf05186fa993d181e5f9e15 100644 (file)
--- a/arch/sh/include/mach-dreamcast/mach/sysasic.h
+++ b/arch/sh/include/mach-dreamcast/mach/sysasic.h
@@ -22,7 +22,7 @@
    takes.
 */
 
-#define HW_EVENT_IRQ_BASE  48
+#define HW_EVENT_IRQ_BASE  (48 + 16)
 
 /* IRQ 13 */
 #define HW_EVENT_VSYNC     (HW_EVENT_IRQ_BASE +  5) /* VSync */

diff --git a/arch/sh/include/mach-se/mach/se7724.h b/arch/sh/include/mach-se/mach/se7724.h
index 1fe28820dfa95373c42b46ac29e9dfc277c0be44..ea6c46633b3375ffcaf3e4acf9ce11c3a6c79c42 100644 (file)
--- a/arch/sh/include/mach-se/mach/se7724.h
+++ b/arch/sh/include/mach-se/mach/se7724.h
@@ -37,7 +37,7 @@
 #define IRQ2_IRQ        evt2irq(0x640)
 
 /* Bits in IRQ012 registers */
-#define SE7724_FPGA_IRQ_BASE   220
+#define SE7724_FPGA_IRQ_BASE   (220 + 16)
 
 /* IRQ0 */
 #define IRQ0_BASE      SE7724_FPGA_IRQ_BASE

diff --git a/arch/sh/kernel/cpu/sh3/entry.S b/arch/sh/kernel/cpu/sh3/entry.S
index e48b3dd996f58d6dfd9452640e16d5c5e29f8563..b1f5b3c58a018c55417fc656ae0618a9cb1f224c 100644 (file)
--- a/arch/sh/kernel/cpu/sh3/entry.S
+++ b/arch/sh/kernel/cpu/sh3/entry.S
@@ -470,9 +470,9 @@ ENTRY(handle_interrupt)
        mov     r4, r0          ! save vector->jmp table offset for later
 
        shlr2   r4              ! vector to IRQ# conversion
-       add     #-0x10, r4
 
-       cmp/pz  r4              ! is it a valid IRQ?
+       mov     #0x10, r5
+       cmp/hs  r5, r4          ! is it a valid IRQ?
        bt      10f
 
        /*

diff --git a/include/linux/sh_intc.h b/include/linux/sh_intc.h
index 37ad81058d6aedfd86667e2f54e8e8b401fbff8f..27ae79191bdc377ff81771d214e153080fb99337 100644 (file)
--- a/include/linux/sh_intc.h
+++ b/include/linux/sh_intc.h
@@ -13,9 +13,9 @@
 /*
  * Convert back and forth between INTEVT and IRQ values.
  */
-#ifdef CONFIG_CPU_HAS_INTEVT
-#define evt2irq(evt)           (((evt) >> 5) - 16)
-#define irq2evt(irq)           (((irq) + 16) << 5)
+#ifdef CONFIG_CPU_HAS_INTEVT   /* Avoid IRQ0 (invalid for platform devices) */
+#define evt2irq(evt)           ((evt) >> 5)
+#define irq2evt(irq)           ((irq) << 5)
 #else
 #define evt2irq(evt)           (evt)
 #define irq2evt(irq)           (irq)