drm/amd/display: Fix 64 bit modulus operation using div64 API

[why]
Synchronization displays with different timings feature uses
reminder of 64 bit division (modulus operator) , which is not
supported by 32 bit platforms

[how]
Use div64 API for 64 bit modulus

Signed-off-by: Vladimir Stempen <vladimir.stempen@amd.com>
Tested-by: Bindu Ramamurthy<bindu.r@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index 45f4dbd886b9a5554a40c652d358b8069379ebc2..190b10445e03a570c11b41c056c7c37486cdf8d6 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -1893,16 +1893,21 @@ uint64_t reduceSizeAndFraction(
        num = *numerator;
        denom = *denominator;
        for (i = 0; i < count; i++) {
+               uint32_t num_reminder, denom_reminder;
+               uint64_t num_result, denom_result;
                if (checkUint32Bounary &&
                        num <= max_int32 && denom <= max_int32) {
                        ret = true;
                        break;
                }
-               while (num % prime_numbers[i] == 0 &&
-                          denom % prime_numbers[i] == 0) {
-                       num = div_u64(num, prime_numbers[i]);
-                       denom = div_u64(denom, prime_numbers[i]);
-               }
+               do {
+                       num_result = div_u64_rem(num, prime_numbers[i], &num_reminder);
+                       denom_result = div_u64_rem(denom, prime_numbers[i], &denom_reminder);
+                       if (num_reminder == 0 && denom_reminder == 0) {
+                               num = num_result;
+                               denom = denom_result;
+                       }
+               } while (num_reminder == 0 && denom_reminder == 0);
        }
        *numerator = num;
        *denominator = denom;